71M6533/71M6534 Data Sheet
FDS_6533_6534_004
VREF
GNDA GNDD V3P3A
V3P3SYS
IAP
IAN
VA
IBP
IBN
VB
ICP
ICN
VC
IDP
IDN
∆Σ ADC
CONVERTER
V3P3D
VBAT
VBIAS
VADC
VBIAS
CE
PLS_INV
MUXP
RTM
FIR
FIR_LEN
PLS_INTERVAL
PLS_MAXWIDTH
CE_LCTN
EQU
PRE_SAMPS
SUM_CYCLES
RTM_0...3
RTM_E
to TMUX
22
VB_REF
ADC_E
VDDREFZ
VOLT
REG
LCD_ONLY
SLEEP
RPULSE
WPULSE
XPULSE
YPULSE
VREF
VREF_CAL
VREF_DIS
VREF
EQU
MUX_AL
MUX_DIV
CE_E
V2P5
VBAT
CE_DATA
CE_PROG
16
2.5V to logic
2.5V_NV
32
TEMP
FLASH
128KB
XRAM
4kB
2.5V_NV
MCK
PLL
RTCLK (32KHz)
DIO_PV
CK_CE
DIO_PW
DIO_PX
DIO_PY
OSC
(32KHz)
CK_MPU
XIN
MPU_DIV
CKOUT_E
XOUT
RTCA_ADJ
DIO56...DIO58
3
CKTEST
CKOUT_E
DIO52/SEG72*...DIO55/SEG75*
DIO47/SEG67...DIO51/SEG71
DIO46/SEG66*
DIO43/SEG63...DIO45/SEG65
DIO42/SEG62*
RTC
MULTI-
PURPOSE
I/O
2.5V_NV
4
5
RST_SUBSEC
QREG,PREG
RTC_DAY
3
RTC_DATE
RTC_MO
RTC_YR
RTC_HR
RTC_MIN
RTC_SEC
COM0..3
4
LCD DISPLAY
DRIVER
COM3..0
4
TEST
MODE
TEST
DIO41/SEG61
LCD_DAC
LCD_MODE
LCD_CLK
LCD_E
LCD_BLKMAP
LCD_SEG
LCD_Y
DIO36/SEG56*...DIO39/SEG59*
DIO29/SEG49...DIO30/SEG50
DIO28/SEG48*
DIO23/SEG43...DIO27/SEG47
DIO22/SEG42*
DIO13/SEG33...DIO21/SEG41
DIO12/SEG32*
DIO10/SEG30...DIO11/SEG31
4
2
8
MPU
Segments
5
9
2
DIGITAL I/O
DIO_DIR
DIO_R
RX
TX
DIO_1..24
24
UART1
PB
DIO
XRAM BUS
8
DIO9/SEG29/YPULSE
DIO8/SEG28/XPULSE
DIO7/SEG27/RPULSE
DIO6/SEG26/WPULSE
DIO5/SEG25/SDATA
DIO4/SEG24/SDCK
DIO3
PCSZ
PCLK
PSI
SPI SLAVE
PCMD
SPE
PB
PSO
EEPROM I/F
EEDATA
EECTRL
SDATA
SCLK
DIO_EEX
DIO2/OPT_TX
DIO1/OPT_RX
UART2/OPTICAL
OPT_RXDIS
OPT_RXINV
OPT_TXE
OPT_TXINV
OPT_TXMOD
OPT_FDC
OPT_TX
OPT_RX
OPT_TXE
SEG20...SEG23
SEG12 ...SEG18
SEG11/E_RST
SEG10/E_TCLK
SEG9/E_RXTX
SEG8
4
7
VBIAS
2.5V_NV
NV RAM
GP0-GP7
V2*
+
V2_OK*
SEG7/MUX_SYNC
SEG6/PSDI
SEG5/PCSZ
SEG4/PSDO
SEG3/PCLK
EMULATOR
IRAM BUS
8
IRAM
256B
-
E_RXTX
E_TCLK
E_RSTZ
ICE_E
SEG0...SEG2
ICE_E
3
FAULTZ
V1
POWER FAULT
TEST
MUX
TMUXOUT
TMUX[4:0]
* 71M6534/6534H only
3/10/2009
RESET
ICE_E
Figure 1: IC Functional Block Diagram
8
© 2007-2009 TERIDIAN Semiconductor Corporation
v1.1