71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
AUGUST 2007
VREF VBIAS
V3P3A GNDA
GNDA
IA
VA
IB
VBIAS
∆Σ ADC
CONVERTER
VOLTAGE
BOOST
MUX
VDRV
-
V3P3A
FIR
LCD_IBST
+
LCD_BSTEN
FILTER
VREF
VREF
GNDD
FIR_LEN
CHOP_EN
VREF_DIS
MUX
TEMP
MUX
CTRL
CK32
VOLT
REG
EQU
V3P3D
VBAT
MUX_ALT
MUX_DIV
0.1V
XIN
MCK
PLL
RTCLK (32KHz)
OSC
GNDD
(32KHz)
XOUT
OSC_DIS
V2P5
VLCD
V2P5
CK_EN
CKFIR
4.9MHz
2.5V to logic
CKTEST
4.9MHz
CK_2X
CKOUT_EN
CK_GEN
CE RAM
(1KB)
SSI
ECK_DIS
MPU_DIV
CKMPU_2X
MUX_SYNC
WPULSE
VARPULSE
RTM
STRT
MUX
CKCE
<4.9MHz
CE
LCD DISPLAY
DRIVER
DATA
00-FF
32-bit Compute
Engine
COM0..3
MEMORY SHARE
TEST
SEG0..SEG2
PROG
CE
000-7FF
1000-13FF
SEG8..SEG19
CONTROL
LCD_NUM
LCD_MODE
LCD_CLK
LCD_EN
SEG24/DIO4 ...
SEG31/DIO11
SEG34/DIO14 ...
SEG37/DIO17
EQU
RTM_EN
CE_EN
DIGITAL I/O
PRE_SAMPS
DIO_EEX
PULSEV/W
DIO_IN
WPULSE
VARPULSE
SUM_CYCLES
CE_RUN
SEG3/SCLK
SEG4/SSDATA
SEG5/SFR
SEG6/SRDY
SEG7/
DIO_OUT
LCD_NUM
DIO_GP
CE PROG
RAM
(4KB)
3000-3FFF
CE_LOAD
RTCLK
RTC
RTC_HOLD
RTC_SET
MUX_SYNC
CKMPU
<4.9MHz
CONFIGURATION
PARAMETERS
EEPROM
INTERFACE
CONFIG
RAM
SCL
SDA
2000-20FF
0000-07FF
DMUX
F
DATA
XFER_BUSY
CE_BUSY
RTCLK
reserved
CK_MPU
CK_10M
MUX_SYNC
OPTRX
reserved
reserved
WDTR_EN
RTM
TX
RX
0000-FFFF
MPU
E
D
C
B
UART
(8051)
MPU XRAM
(2KB)
A
DIGITAL
PROG
0000-FFFF
FLASH
(64KB)
9
8
7
6
5
4
3
2
1
0
OPT_TX
OPT_RX
0000-FFFF
OPTICAL
VBIAS
EERDSLOW
EEWRSLOW
OPT_TXDIS
POWER FAULT
V1
EMULATOR
PORT
WAKE
FAULTZ
VBIAS
PLL_2.5V
IBIAS
V3P3
ANALOG
TMUXOUT
COMP_STAT
COMP_INT
DGND
TMUX
October 5, 2005
RESETZ
Figure 1: IC Functional Block Diagram
Page: 7 of 95
© 2005-2007 TERIDIAN Semiconductor Corporation
V2.6
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
