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5303B-CMR/F 参数 Datasheet PDF下载

5303B-CMR/F图片预览
型号: 5303B-CMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 通用三输入A / V开关接口 [Universal 3-Input A/V Switch Interface]
分类和应用: 开关消费电路商用集成电路
文件页数/大小: 16 页 / 232 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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AVPro® 5303B  
Universal 3-Input A/V Switch Interface  
DATA SHEET  
ELECTRICAL SPECIFICATIONS  
ABSOLUTE MAXIMUM RATINGS  
Operation beyond the maximum ratings may damage the device  
PARAMETER  
Storage temperature  
RATING  
-55 to 150 °C  
Junction operating temperature  
+125 °C  
5V supply voltage pins  
12V supply pin  
Voltage applied to Digital and Video Inputs  
Voltage applied to video pins  
Voltage applied to audio pins  
Voltage applied to FNC pin (input)  
-0.3 V < VCC < 6V  
-0.3 V < VDD < 13V  
-0.3V to VCC+0.3 V  
-0.3V to VCC+0.3 V  
-0.3 V < VDD < 13V  
-0.3 V < VDD < 13V  
SPECIFICATIONS: Unless otherwise specified: 0° < Ta < 70 °C; power supplies VCC = +5.0 V ±5%, VDD = 12.0 V  
±5%.  
Parameter  
Operating Characteristics  
CONDITION  
MIN  
NOM  
MAX  
UNIT  
Power Supply Currents  
(Default register setting)  
All outputs not loaded  
VCC (+5 VDC)  
VDD (+12 VDC)  
16.5  
4
20  
5
mA  
mA  
Power Supply Currents  
(Default register setting)  
Pdwn = 1  
VCC (+5 VDC)  
VDD (+12 VDC)  
2.3  
10  
3
100  
mA  
µA  
PSRR  
Switch time  
Wake time  
f = 100 Hz, 0.3 Vpp on VCC/ VDD  
From serial data acknowledge  
From Power Down Condition  
40  
dB  
µs  
µs  
in  
2.0  
5
Serial Port Timing (Set by I2C controller)  
SCLK Input Frequency  
400  
kHz  
µs  
µs  
ns  
ns  
ns  
ns  
µs  
µs  
µs  
ns  
SCLK LOW time (tCL)  
SCLK HIGH time (tCH)  
Rise time (tRT)  
Fall time (tFT)  
Data set-up time* (tDSU)  
Data hold time* (tDH)  
Start set-up time (tSSU)  
Start hold time (tSH)  
Stop set-up time (tPSU)  
Glitch rejection  
1.3  
0.6  
SCLK and SDATA  
SCLK and SDATA  
SDATA change to SCLK HIGH  
SCLK LOW to SDATA change  
300  
300  
100  
30  
0.6  
0.6  
0.6  
maximum pulse on SCLK and/or  
50  
SDATA  
* These specifications also apply to an acknowledge generated by the device.  
Page: 8 of 16  
© 2005 TERIDIAN Semiconductor Corporation  
Rev 1.0