LOGIC-INPUT CMOS
QUAD DRIVERS
TC4467
TC4468
TC4469
Supply Bypassing
Three components make up total package power
dissipation:
Large currents are required to charge and discharge
large capacitive loads quickly. For example, charging a
1000 pF load to 18V in 25nsec requires 0.72A from the
device's power supply.
(1) Load-caused dissipation (PL)
(2) Quiescent power (PQ)
(3) Transition power (PT).
To guarantee low supply impedance over a wide fre-
quencyrange,a1µFfilmcapacitorinparallelwithoneortwo
low-inductance 0.1 µF ceramic disk capacitors with short
lead lengths (<0.5 in.) normally provide adequate bypass-
ing.
A capacitive-load-caused dissipation (driving MOSFET
gates), is a direct function of frequency, capacitive load, and
supply voltage. The power dissipation is:
2
PL = f C VS ,
Grounding
where: f = Switching frequency
C = Capacitive load
The TC4467 and TC4469 contain inverting drivers.
Potential drops developed in common ground impedances
from input to output will appear as negative feedback and
degradeswitchingspeedcharacteristics.Instead,individual
ground returns for input and output circuits, or a ground
plane, should be used.
VS = Supply voltage.
A resistive-load-caused dissipation for ground-refer-
enced loads is a function of duty cycle, load current, and
load voltage. The power dissipation is:
Input Stage
PL = D (VS – VL) IL,
The input voltage level changes the no-load or quies-
cent supply current. The N-channel MOSFET input stage
transistor drives a 2.5 mA current source load. With logic "0"
outputs, maximum quiescent supply current is 4 mA. Logic
"1" output level signals reduce quiescent current to 1.4 mA
maximum. Unused driver inputs must be connected to VDD
or VSS. Minimum power dissipation occurs for logic "1"
outputs.
The drivers are designed with 50 mV of hysteresis. This
provides clean transitions and minimizes output stage cur-
rent spiking when changing states. Input voltage thresholds
are approximately 1.5V, making any voltage greater than
1.5V up to VDD a logic 1 input . Input current is less than 1 µA
over this range.
where: D = Duty cycle
VS = Supply voltage
VL = Load voltage
IL = Load current.
A resistive-load-caused dissipation for supply-refer-
enced loads is a function of duty cycle, load current, and
output voltage. The power dissipation is:
PL = D VO IL,
where: f = Switching frequency
VO = Device output voltage
IL = Load current.
Power Dissipation
Thesupplycurrentversusfrequencyandsupplycurrent
versus capacitive load characteristic curves will aid in deter-
mining power dissipation calculations. TelCom Semicon-
ductor's CMOS drivers have greatly reduced quiescent DC
power consumption.
Input signal duty cycle, power supply voltage and load
type, influence package power dissipation. Given power
dissipation and package thermal resistance, the maximum
ambient operating temperature is easily calculated. The 14-
pin plastic package junction-to-ambient thermal resistance
is 83.3°C/W. At +70°C, the package is rated at 800mW
maximum dissipation. Maximum allowable chip tempera-
ture is +150°C.
Quiescent power dissipation depends on input signal
duty cycle. Logic HIGH outputs result in a lower power
dissipation mode, with only 0.6 mA total current drain (all
devicesdriven).LogicLOWoutputsraisethecurrentto4mA
maximum. The quiescent power dissipation is:
PQ = VS (D (IH) + (1–D)IL),
where: IH = Quiescent current with all outputs LOW
(4 mA max)
IL = Quiescent current with all outputs HIGH
(0.6 mA max)
D = Duty cycle
VS =Supply voltage.
4-264
TELCOM SEMICONDUCTOR, INC.
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
