BiCMOS CURRENT MODE
PWM CONTROLLERS
TC18C43
TC28C43
TC38C43
PDIP RθJ-A ................................................... 125°C/W
PDIP RθJ-C ..................................................... 45°C/W
SOIC RθJ-A ................................................... 250°C/W
SOIC RθJ-C ..................................................... 75°C/W
Operating Temperature
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ............................................................18V
Maximum Chip Temperature................................... 150°C
Storage Temperature ............................ – 65°C to +150°C
Lead Temperature (Soldering, 10 sec) ................. +300°C
Package Thermal Resistance
18C4x ...................................... – 55C° ≤ TA ≤ +125°C
28C4x ........................................ – 40C° ≤ TA ≤ +85°C
38C4x ............................................. 0C° ≤ TA ≤ +70°C
CerDip RθJ-A ................................................ 150°C/W
CerDip RθJ-C .................................................. 55°C/W
ELECTRICAL CHARACTERISTICS unless otherwise stated, these specifications apply over specific
temperature range. VIN = VDD = 15V; RT = 71 kΩ; CT = 150 pF.
TC18C43
TC28C43
TC38C43
Typ
Parameter
Test Conditions
Min Typ
Max
Min
Max
Units
Reference Section
Output Voltage
TA = 25°C, IO = 1mA
4.9
—
5
5.1
±10
±15
4.90
—
5
±3
5.10
±10
±10
±0.5
—
V
mV
Line Regulation
9.5V ≤ VIN ≤ 15V, IO = 1mA
1mA ≤ lO ≤ 11mA
±3
±5
Load Regulation
Temp Stability
—
—
±3
mV
(Note 1)
—
±0.25 ±0.5
—
±0.25
100
±0.5
-50
mV/°C
µV(rms)
%
Output Noise Voltage
Long Term Stability
Output Short Circuit
10Hz ≤ f ≤ 10 kHz,TA = 25°C (Note 1)
TA = 125°C, 1000 Hrs. (Note 1)
—
100
±0.5
-50
—
—
—
—
—
—
-20
-100
-30
-100
mA
Oscillator Section
Initial Accuracy
Voltage Stability
Temp Stability
TA = 25°C (Note 4)
9.5V ≤ VIN ≤ 15V
90
—
100
110
93.8
—
100
106.5
kHz
%
±0.2
±0.3
±0.2
±0.3
T
MIN ≤ TA ≤ TMAX (Note 1); Figure 2
—
±0.01 ±0.05
—
±0.01 ±0.03
%/°C
mA
V
Clock Ramp Reset
Amplitude
RT/CT Pin at 4V
RT/CT Pin Peak to Peak
Note 1
2.25
2.45
1
2.5
2.65
—
2.75
2.85
—
2.25
2.45
1
2.5
2.65
—
2.75
2.85
—
Maximum Freq
MHz
Error Amp Section
Input Offset Voltage
Input Bias Current
AVOL
V(CMPTR) = 2.5V
(Note 1)
—
—
±15
±0.3
90
±50
±2
—
—
—
—
—
6.5
1.1
7
—
—
±15
±0.3
90
±50
±2
—
—
—
—
—
6.5
1.1
7
mV
nA
2V ≤ VO ≤ 4V
70
650
80
1.2
3
70
dB
Gain Bandwidth Product (Note 1)
750
100
1.5
3.4
6
650
80
750
100
1.7
4.2
6
kHz
dB
PSRR
9.5V ≤ VIN ≤ 15V
Output Sink Current
Output Source Current
VOUT High
VFB = 2.7V, V(CMPTR) = 1.1V (Note 1)
VFB = 2.3V, V(CMPTR) = 5V (Note 1)
VFB = 2.3V, RL = 10k to Ground
VFB = 2.7V, RL = 10k to VREF
Note 1
1.5
3.9
5.65
0.1
—
mA
mA
V
5.65
VOUT Low
0.1
—
0.7
5
0.7
5
V
Rise Response
Fall Response
µsec
µsec
Note 1
—
3
5
—
3
5
Current Sense Section
Gain Ratio
Notes 2 & 3
2.8
0.85
70
2.9
0.95
80
3.1
1.05
—
2.8
0.85
70
2.9
0.95
80
3.1
1.05
—
V/V
V
Maximum Input Signal
PSRR
V(CMPTR) = 5V (Note 2)
9.5V ≤ VIN ≤ 15V (Notes 1, 2 & 5)
Note 1
dB
Input Bias Current
Delay to Output
—
±0.3
140
±2
—
±0.3
140
±2
nA
V(ISENSE) = 1V (Note 1); Figure 3
—
160
—
150
nsec
4-94
TELCOM SEMICONDUCTOR, INC.
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
