欢迎访问ic37.com |
会员登录 免费注册
发布采购

TC25C25 参数 Datasheet PDF下载

TC25C25图片预览
型号: TC25C25
PDF下载: 下载PDF文件 查看货源
内容描述: BICMOS PWM控制器 [BICMOS PWM CONTROLLERS]
分类和应用: 信息通信管理控制器
文件页数/大小: 7 页 / 88 K
品牌: TELCOM [ TELCOM SEMICONDUCTOR, INC ]
 浏览型号TC25C25的Datasheet PDF文件第1页浏览型号TC25C25的Datasheet PDF文件第2页浏览型号TC25C25的Datasheet PDF文件第3页浏览型号TC25C25的Datasheet PDF文件第4页浏览型号TC25C25的Datasheet PDF文件第6页浏览型号TC25C25的Datasheet PDF文件第7页  
BICMOS PWM CONTROLLERS  
4
TC25C25  
TC35C25  
OUTPUT SECTION  
OSCILLATOR SYNCHRONIZATION WITH  
SEPARATE RC TIMER  
The output stage of the TC35C25 is comprised of two  
pairs of complimentary CMOS drivers operating in a push-  
pull mode. Each output is capable of sinking or sourcing  
nearly 500mA of peak current. They are also capable of  
absorbing just as much "kick-back" current without latching.  
Synchronization can also be done by having a separate  
RC timing circuit on the slave oscillator that is slightly lower  
frequency than the master oscillator. The sync input will not  
be in a high impedance state so the number of slave  
oscillators is limited. This method of synchronization is  
useful when slave oscillator is located in a different location.  
When a separate RC timer is used in the slave controller,  
ground loop noise pickup in the oscillator is minimized.  
SOFT START  
A soft restart recovery rate may be selected by placing  
a capacitor from SOFT START (pin 8) to ground. The  
calculationfortherecoverytimingisapproximately60msec/  
µF.  
SOFT START will mediate the start-up from under  
voltage recovery, power-on, or SHUTDOWN.  
6
R
T
R
T
MASTER  
TCx5C25  
5
C
GND  
12  
OSC OUT  
4
T
SHUTDOWN  
C
T
There is a minimum delay, non-latching shutdown fea-  
ture on the TC35C25 PWM controller. Both outputs may be  
turnedoffbyapplyingapositivevoltagetoSHUTDOWN(pin  
10). Typical shutdown threshold is 2.4V. Returning the pin  
back to ground will reinitialize the soft start cycle.  
3
6
R
C
SYNC  
T
R
T
SLAVE  
TCx5C25  
GND  
12  
5
OSCILLATOR SECTION  
T
C
T
A tri-state feature has been added to accommodate  
systems which require multiple controllers to be run in a  
"master/slave"configuration. Thetimingresistorpin(RT, pin  
6) may be tied to VREF to place the sync pin (SYNC, pin 3)  
in a high impedance state. This will allow the chip to be  
clocked from an external source.  
SLAVE TC > MASTER TC  
The sync output (OSC OUT, pin 4) of the TC35C25 can  
drive several sync inputs configured in this manner.  
OSCILLATOR SYNCHRONIZATION  
Synchronization of two TC35C25's can be done by  
making one PWM Controller as the master oscillator to  
synchronize the slave as follows:  
6
R
T
R
T
MASTER  
TCx5C25  
5
C
GND  
12  
OSC OUT  
4
T
C
T
16  
3
6
5
V
R
C
SYNC  
REF  
T
SLAVE  
TCx5C25  
GND  
12  
T
TELCOM SEMICONDUCTOR, INC.  
4-115