MICROPROCESSOR MONITOR
1
2
3
4
5
6
7
8
TC1232
AC ELECTRICAL CHARACTERISTICS: (Cont.) TA = TMIN to TMAX; VCC = +5V to +10%, unless otherwise
specified.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
tR
VCC Rise Time (Note 4)
Figure 6
0
—
—
—
µsec
tRPD
VCC Detect to RST High
and RST Low
Figure 7, VCC Falling
—
100
nsec
tRPU
VCC Detect to RST High
and RST Open (Note 6)
Figure 8, VCC Rising
250
610
1000
msec
NOTES: 1. PB RST is internally pulled up to VCC with an internal impedance of typically 40kΩ.
2. Measured with outputs open.
3. All voltages referenced to GND.
4. Guaranteed by design.
5. PB RST must be held low for a minimum of 20msec to guarantee a reset.
6. tR = 5µsec.
PIN CONFIGURATIONS
16-Pin SOIC Wide
8-Pin SOIC
8-Pin PDIP
1
2
3
4
5
6
7
8
16
15
14
13
12
NC
NC
VCC
NC
ST
VCC
VCC
ST
PB RST
TD
1
2
3
4
8
7
6
5
PB RST
TD
1
8
7
6
5
PB RST
NC
ST
2
3
4
RST
RST
TOL
TOL
TC1232COA
TC1232EOA
TC1232CPA
TC1232EPA
TD
RST
RST
GND
GND
NC
NC
TC1232COE
TC1232EOE
11 RST
TOL
NC
10
9
NC
RST
GND
PIN DESCRIPTION
Pin No.
Pin No.
Pin No.
(8-Pin PDIP) (8-Pin SOIC) (16-Pin SOIC) Symbol Description
1
1
2
PB RST Push-button Reset Input. A debounced active-low input that ignores
pulses less than 1msec in duration and is guaranteed to recognize inputs
of 20msec or greater.
2
3
2
3
4
6
TD
Time Delay Set. The watchdog time-out select input (tTD = 150msec for
TD = 0V, tTD = 600msec for TD = open, tTD = 1.2sec for TD = VCC).
TOL
Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10%
tolerance.
4
5
4
5
8
9
GND Ground.
RST Reset Output (Active High) - goes active:
1. If VCC falls below the selected reset voltage threshold
2. If PB RST is forced low
3. If ST is not strobed within the minimum time-out period
4. During power-up
6
7
8
6
7
8
11
13
RST Reset Output (Active Low, Open Drain) - see RST.
ST
VCC
NC
Strobe Input. Input for watchdog timer.
The +5V Power-Supply Input.
No Internal Connection.
15
1, 3, 5, 7, 10,
12, 14, 16
TELCOM SEMICONDUCTOR, INC.
5-21
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
