HV518
Electrical Characteristics
(over recommended ranges of operating free-air temperature and VDD. Unless otherwise noted, VPP = 80V)
Symbol
IDD
Parameter
Min
Typ
Max
10
Units
mA
mA
mA
mA
µA
V
Conditions
Supply current
VDD = 5V, fCH = 6.0 MHz
VDD = 5.5V, VIN = 0V
Output high, TA = -40°C
Output high, TA = 0 to +85°C
Outputs low
IDDQ
IPP
Quiescent supply current
Supply current
0.5
12
7
10
500
VOH
High-level output voltage
Low-level output
HVoutput
70.0
4.5
IOH= -25mA
Serial output
HVoutput
4.9
5
5
V
V
DD = 5V, IOH = -20µA
IOL= 1mA
IOL =20µA
VOL
V
Serial output
0.06
0.1
0.8
1
V
IIH
IIL
High-level logic input current
Low-level logic input current
µA
µA
VIH = VDD
VIL = 0V
-0.1
-1
Note: The total number of ON outputs times the duty cycle must not exceed the allowable package power disspation.
Switching Characteristics (VPP = 80V, CL = 50 pF, TA = 25°C, unless otherwise noted)
Symbol Parameter
Min
Max
Unit
Conditions
td
Delay time, Clock to data output
VDD = 4.5V
VDD = 4.5V
600
ns
CL =15 pF
See Figure 4
tDHL
Delay time, high-to-low-level, from latch enable
HVoutput from strobe
Delay time, low-to-high-level from latch enable
HVoutput from strobe
1.5
1
µs
µs
See Figure 5
See Figure 6
See Figure 5
See Figure 6
See Figure 6
See Figure 6
tDLH
VDD = 4.5V
1.5
1
tTHL
tTLH
Transition time, high-to-low-level, HVoutput
Transition time, low-to-high-level, HVoutput
VDD = 4.5V
VDD = 4.5V
3
µs
µs
2.5
Recommended Operating Conditions (TA = 25°C, unless otherwise noted)
Symbol
VDD
VPP
VIH
Parameter
Min
4.5
8
Max
5.5
80
Units
Logic voltage supply
High voltage supply
V
V
High-level input voltage (See Fig.3.)
Low-level input voltage (See Fig. 3.)
High-level output current
VDD = 4.5V
VDD = 4.5V
3.5
V
VIL
1
V
IOH
-25
mA
mA
MHz
ns
ns
ns
ns
°C
IOL
Low-level output current
2
fCLK
tw(CKH)
tw(CKL)
tsu
Clock frequency (see Figure 3)
Pulse duration , clock high
Pulse duration , clock low
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
6.0
83
83
Setup time, data before clock
Hold time, data after clock
75
th
75
TA
Operating free-air temperature
-40
85
Note:
Power-up sequence should be the following:
1. Connect ground.
4. Apply VPP
.
2. Apply VDD
.
5. The VPP should not drop below VDD or float during operation.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
Power-down sequence should be the reverse of the above.
2
SUPERTEX [ Supertex, Inc ]
