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HV2203 参数 Datasheet PDF下载

HV2203图片预览
型号: HV2203
PDF下载: 下载PDF文件 查看货源
内容描述: 低电荷注入,8通道高压模拟开关 [Low Charge Injection, 8-Channel High Voltage Analog Switch]
分类和应用: 开关高压
文件页数/大小: 9 页 / 837 K
品牌: SUPERTEX [ Supertex, Inc ]
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HV2203  
Pin Configurations  
Ordering Information  
25  
36  
Package Options  
48-Lead LQFP 28-Lead PLCC  
HV2203FG-G HV2203PJ-G  
24  
Device  
37  
HV2203  
-G indicates package is RoHS compliant (‘Green’)  
13  
48  
1
12  
48-Lead LQFP (FG)  
Absolute Maximum Ratings  
Parameter  
Value  
VDD logic supply  
-0.5V to +6.5V  
170V  
VPP-VNN differential supply  
VPP positive supply  
-0.5V to VNN+170V  
+0.5V to -170V  
-0.5V to VDD +0.3V  
VNN to VPP  
VNN negative supply  
28-Lead PLCC (PJ)  
Logic input voltage  
Analog signal range  
Product Marking  
Peak analog signal current/channel  
Storage temperature  
1.0A  
Top Marking  
-65°C to 150°C  
YYWW  
YY = Year Sealed  
Thermal resistance (θja):  
HV2203FG  
WW = Week Sealed  
L = Lot Number  
48-Lead LQFP (FG)  
61OC/W  
LLLLLLLLL  
Absolute Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation under these conditions is not implied. Continuous operation of the device at  
the absolute rating level may affect device reliability. All voltages are referenced to device ground.  
C = Country of Origin*  
A = Assembler ID*  
Bottom Marking  
CCCCCCCC  
AAA  
= “Green” Packaging  
*May be part of top marking  
Operating Conditions  
Sym Parameter  
Value  
3.0V to 5.5V  
48-Lead LQFP (FG)  
VDD Logic power supply voltage  
VPP Positive high voltage supply  
VNN Negative high voltage supply  
VIH High level input voltage  
VIL Low-level input voltage  
Top Marking  
40V to VNN +160V  
-40V to -120V  
0.9VDD to VDD  
YYWW  
YY = Year Sealed  
WW = Week Sealed  
L = Lot Number  
HV2203PJ  
LLLLLLLLLL  
C = Country of Origin  
A = Assembler ID*  
Bottom Marking  
0V to 0.1VDD  
VSIG Analog signal voltage peak-to-peak VNN +10V to VPP -10V  
= “Green” Packaging  
CCCCCCCCCCC  
AAA  
*May be part of top marking  
TA  
Operating free air temperature  
0OC to 70OC  
Notes:  
28-Lead PLCC (PJ)  
1. Power up/down sequence is arbitrary except GND must be powered-up first and powered-  
down last.  
2. VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transition.  
3. Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec.  
2