HV2116
Truth Table
Notes:
1. The eight switches operate
independently.
2. Serial data is clocked in on the L→ H
transition CLK.
3. The switches go to a state retaining
their present condition at the rising
edge of LE. When LE is low the shift
register data flows through the latch.
D0 D1 D2 D3 D4 D5 D6 D7 LE SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
OFF
ON
H
L
OFF
ON
H
4.
DOUT is high when switch 7 is on.
L
OFF
ON
5. Shift register clockng has no effect on
the switch states if LE is H.
H
L
OFF
ON
H
L
OFF
ON
H
L
OFF
ON
H
L
OFF
ON
H
L
H
X
OFF
ON
X
X
X
X
X
X
X
HOLD PREVIOUS STATE
Typical Performance Curves
IDD vs CLK Frequency
Off Isolation vs Signal Voltage Frequency
V
= 15V, V /V
= ±80V, TA = 0°C to 70°C
V
= 15V, V /V
= ±80V
DD
PP NN
DD
PP NN
-120
-100
-80
6
5
4
3
2
1
13
13
-60
-40
-20
10K
100K
1M
10M
10K
100K
1M
10M
Signal Voltage Frequency (Hz)
CLK Frequency (Hz)
Crosstalk vs Analog Signal Frequency
V
= 15V, V /V
= ±80V
DD
PP NN
-100
-90
-80
-70
-60
-50
°
70 C
0°C
100K
1M
10M
100M
Analog Signal Frequency (Hz)
13-63