AN1262 APPLICATION NOTE
Table 7. (continued)
Symbol
Is
RMS
Description
Total RMS Secondary Current
Definition
D'
Is
RMS
=
Is
pk
⋅
----
-
3
2
2
Is
AC
RMS Secondary Current (AC component only)
Is
AC
=
Is
RMS
–
Is
DC
Once this information has been found, it is possible to evaluate the power dissipation of the IC and check for
thermal limitations. Table 8 summarizes the relationships that can be used for this evaluation. In those formulae:
- T
c
is the crossover time of the voltage and current waveforms at MOSFET's turn off;
- C
drain
is the total capacitance of the drain, composed of the C
oss
of the MOSFET, the parasitic capacitance of
the primary winding and, in case, some external capacitance.
As previously said, the worst-case operating conditions for the IC usually occur at V
in
= V
DCmin
, however it is
worthwhile checking the losses also at maximum input voltage, that is at V
in
= V
PKmax
, especially if an external
capacitor is added on the drain.
With the worst-case total losses in the IC it is possible to find the maximum junction-to-ambient thermal resis-
tance allowed for safe operation at maximum ambient temperature.
The operating temperature range of the devices extends to 150 °C, however designing for such high tempera-
ture is not recommended. A reasonable target can be to design for 125 °C maximum die temperature:
125
–
T
amb
R
thmax
= ----------------------------------------------------------------
-
P
Q
+
P
c ond
+
P
s w
+
P
ca p
(3)
Table 8. IC's power losses estimate
Symbol
P
cond
P
sw
P
CAP
P
Q
Assume:
Conduction losses
Switching losses
Description
2
Definition
P
cond
=
Ip
RMS
⋅
R
DS
(
o n
)max
1
-
P
sw
≈
--
⋅ (
V
in
+
V
R
) ⋅
Ip
p k
⋅
T
c
⋅
f
sw
3
1
2
-
P
CA P
≈
--
⋅
C
drain
⋅ (
V
in
+
V
R
) ⋅
f
s w
2
Capacitive losses
Quiescent losses
R
DS(on) max
= 28
Ω
(@ T
j
= 125 °C)
T
c
= 50ns
f
sw
= 65kHz
C
drain
= 100pF
I
op
= 7mA
P
Q
= V
CC
· I
op
With the aid of the diagrams shown in fig. 20 it is possible to estimate whether the required thermal resistance
is feasible or not and, in the positive case, how large the on-board copper area is supposed to be. Consider that
copper areas larger than 4 cm
2
do not give significant reduction of thermal resistance and may cause PCB lay-
outing to become a serious issue.
If the thermal check does not give positive results, a different heatsinking strategy may be considered, otherwise
a higher maximum duty cycle D
X
should be used, if possible, to reduce the RMS current. Also a higher V
inmin
9/42
STMICROELECTRONICS [ STMICROELECTRONICS ]
