TQFP
Thin Profile Quad Flat Pack
SPECIFICATIONS
Die Thickness
Gold Wire
RELIABILITY
230-280µm (9-11mils) range preferred
25/30µm (1.0/1.2mils) diameter, 99.999%Au
85/15 Sn/Pb or Matte Tin
Moisture Sensitivity Level
JEDEC Level 3
Temperature Cycling
-65°C/150°C, 1000 cycles
Lead Finish
High Temperature Storage
Pressure Cooker Test
150°C, 500 hrs
Marking
Laser/ink
121°C 100% RH,
2 atm, 168 hrs
Packing Options
JEDEC tray/tape and reel
Liquid Thermal Shock (opt)
-55°C/125°C, 1000 cycles
THERMAL PERFORMANCE, θja (°C/W)
Package
Body Size (mm)
Pad Size (mm)
Die Size (mm) Thermal Performance, θja (°C/W)
48L
7 x 7 x 1.0
5.3 x 5.3
3.8 x 3.8
53.4
100L
14 x 14 x 1.0
9.0 x 9.0
7.8 x 7.8
38.6
Note: Simulation data for package mounted on 4 layer PCB (per JEDEC JESD51-7) under natural convection as defined in JESD51-2.
ELECTRICAL PERFORMANCE
Electrical parasitic data is highly dependent on the package layout. 3D electrical simulation can be used on the specific package design
to provide the best prediction of electrical behavior. Data below is for a frequency of 100MHz and assumes 1.0 mil gold bonding wire.
Conductor
Component
Length
(mm)
Resistance
(mOhms)
Inductance
(nH)
Inductance
Mutual (nH)
Capacitance
(pF)
Capacitance
Mutual (pF)
Wire
2
120
1.65
0.45 - 0.85
0.31 - 0.49
0.76 - 1.34
0.45 - 0.85
1.08 - 1.61
1.53 - 2.46
0.10
0.01 - 0.02
0.07 - 0.12
0.08 - 0.14
0.01 - 0.02
0.20 - 0.30
0.21 - 0.32
Lead (7 x 7mm, 32L)
Total (7 x 7mm, 32L)
Wire
1.4 - 2.2
11.0 - 18.0
131 - 138
120
0.64 - 0.99
2.29 - 2.64
1.65
0.21 - 0.33
0.31 - 0.43
0.10
2
Lead (14 x 14mm, 128L)
Total (14 x 14mm, 128L)
3.0 - 4.5
24.0 - 36.0
144.0 - 156.0
1.96 - 2.92
3.61 - 4.57
0.45 - 0.67
0.55 - 0.77
CROSS-SECTION
PACKAGE CONFIGURATIONS
Package Size (mm) Lead Count
7 x 7
32, 48
10 x 10
12 x 12
14 x 14
44, 52, 64
80, 100
100, 128
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©Copyright 2005. STATS ChipPAC Ltd. All rights reserved.
January 2005
STATSCHIP [ STATS CHIPPAC, LTD. ]
