SL23EP09
AC Electrical Specifications (VDD=3.3V and 2.5V) (cont.)
Symbol
Description
Condition
Min
Typ
Max
Unit
tPLLOCK PLL Lock Time[9]
Time from 90% of VDD to valid clocks on all the
output clocks
–
–
1.0
ms
CCJ [2,3]
Cycle-to-cycle Jitter
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
25
65
50
35
30
75
15
15
20
20
20
15
40
30
25
25
15
25
25
40
40
50
125
100
70
60
150
40
40
50
50
50
40
80
70
60
60
45
60
60
80
80
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
3.3V supply, >66 MHz, <15 pF
3.3V supply, >66 MHz, <30 pF, standard drive
3.3V supply, >66 MHz, <30 pF, high drive
2.5V supply, >66 MHz, <15 pF, standard drive
2.5V supply, >66 MHz, <15 pF, high drive
2.5V supply, >66 MHz, <30 pF, high drive
S2:S1 = 1:0 mode, 3.3V, <15pF, standard drive
S2:S1 = 1:0 mode, 3.3V, <15pF, high drive
S2:S1 = 1:0 mode, 2.5V, <15pF, standard drive
S2:S1 = 1:0 mode, 2.5V, <15pF, high drive
3.3V supply, 66–100 MHz, <15 pF
PPJ [2,3]
Peak Period Jitter
3.3V supply, >100 MHz, <15 pF
3.3V supply, >66 MHz, <30 pF, standard drive
3.3V supply, >66 MHz, <30 pF, high drive
2.5V supply, >66 MHz, <15 pF, standard drive
2.5V supply, 66–100 MHz, <15 pF, high drive
2.5V supply, >100 MHz, <15 pF, high drive
S2:S1 = 1:0 mode, 3.3V, <15pF, standard drive
S2:S1 = 1:0 mode, 3.3V, <15pF, high drive
S2:S1 = 1:0 mode, 2.5V, <15pF, standard drive
S2:S1 = 1:0 mode, 2.5V, <15pF, high drive
Notes:
3. Typical jitter is measured at 3.3V or 2.5V, 30qC with all outputs driven into the maximum specified load.
Rev 1.1, February 2, 2007
Page 8 of 13
SPECTRALINEAR [ SPECTRALINEAR INC ]
