SL23EP08
Pin Configuration
16-Pin SOIC/TSSOP
Pin Description
Pin
Number
Pin Name
Pin Type
Pin Description
Reference Frequency Clock Input. 5V tolerant input. Weak pull-down
(250kȍ).
1
CLKIN
Input
2
3
CLKA1
CLKA2
VDD
Output
Output
Power
Power
Output
Output
Input
Buffered Clock Output, Bank A. Weak pull-down (250kȍ).
Buffered Clock Output, Bank A. Weak pull-down (250kȍ).
3.3V to 2.5V Power Supply.
4
5
GND
Power Ground.
6
CLKB1
CLKB2
S2
Buffered Clock Output, Bank B. Weak pull-down (250kȍ).
Buffered Clock Output, Bank B. Weak pull-down (250kȍ).
Select Input, select pin S2. Weak pull-up (250kȍ).
Select Input, select pin S1. Weak pull-up (250kȍ).
Buffered Clock Output, Bank B. Weak pull-down (250kȍ).
Buffered Clock Output, Bank B. Weak pull-down (250kȍ).
Power Ground.
7
8
9
S1
Input
10
11
12
13
14
15
16
CLKB3
CLKB4
GND
Output
Output
Power
Power
Output
Output
Output
VDD
3.3V to 2.5V Power Supply.
CLKA3
CLKA4
FBK
Buffered Clock Output, Bank A. Weak pull-down (250kȍ).
Buffered Clock Output, Bank A. Weak pull-down (250kȍ).
PLL Feedback input.
Rev 1.4, May 28, 2007
Page 2 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
