SL23EP09NZ
Switching Electrical Characteristics (I-Grade – Cont.)
Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C
Measured at 0.8V to 2.0V
Output Rise Time
Output Fall Time
Output Skew
tr
–
–
–
–
–
1.6
1.6
ns
ns
ps
ps
CL=0 to 30pF
Measured at 0.8V to 2.0V
CL=0 to 30pF
tf
–
Measured at VDD/2 and
SKW1
SKW2
110
120
180
220
Outputs are equally loaded
Measured at VDD/2 and
Part to Part Skew
Outputs are equally loaded
Measured at VDD/2 from CLKIN to
Output Clock rising edge and Outputs
are equally loaded
Propagation Delay Time
PDT
–
4.5
7.5
ns
Cycle-to-Cycle Jitter
Cycle-to-Cycle Jitter
CCJ1
CCJ2
CLKIN=66MHz and CL=0 (No Load)
CLKIN=133MHz and CL=0 (No Load)
–
–
45
35
90
70
ps
ps
External Components & Design Considerations
Typical Application Schematic
Comments and Recommendations
Decoupling Capacitor: A decoupling capacitor of 0.1ȝF must be used between all VDD and VSS pins. Place the
capacitor on the component side of the PCB as close to the VDD pin as possible. The PCB trace to the VDD pin and
to the GND via should be kept as short as possible. Do not use vias between the decoupling capacitor and the VDD
pin.
Series Termination Resistor: A series termination resistor is recommended if the distance between the output
clocks and the load is over 1 ½ inch. Place the series termination resistors as close to the clock outputs as possible.
Rev 1.1, May 18, 2007
Page 9 of 11
SPECTRALINEAR [ SPECTRALINEAR INC ]
