W137
DC Electrical Characteristics: (continued)
TA = 0°C to +70°C; VDDQ3 = 3.3V±±%; VDDQ2 = 2.±V±±%; CPU0:1 = 66.6/100 MHz
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Pin Capacitance/Inductance
CIN
Input Pin Capacitance
Except X1 and X2
±
6
7
pF
pF
nH
COUT
LIN
Output Pin Capacitance
Input Pin Inductance
AC Electrical Characteristics
TA = 0°C to +70°C; VDDQ3 = 3.3V 5%; VDDQ2 = 2.5V 5%; fXTL = 14.31818 MHz
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output.
CPU Clock Outputs, CPU0:1 (Lump Capacitance Test Load = 20 pF)
CPU = 66.6 MHz
CPU = 100 MHz
Parameter
tP
Description
Period
Test Condition/Comments
Measured on rising edge at 1.2±V
Duration of clock cycle above 2.0V
Duration of clock cycle below 0.4V
Min. Typ. Max. Min.
Typ. Max. Unit
1±
±.2
±.0
1
1±.±
10
3.0
2.8
1
10.± ns
tH
tL
High Time
Low Time
ns
ns
tR
tF
tD
OutputRiseEdgeRate Measured from 0.4V to 2.0V
Output Fall Edge Rate Measured from 2.0V to 0.4V
4
4
4
4
V/ns
V/ns
%
1
1
Duty Cycle
Measured on rising and falling edge at 4±
1.2±V
±±
4±
±±
tJC
Jitter, Cycle-to-Cycle Measured on rising edge at 1.2±V.
Maximum difference of cycle time
between two adjacent cycles.
200
200
ps
tSK
fST
Output Skew
Measured on rising edge at 1.2±V
17±
3
17±
3
ps
Frequency Stabili-
Assumes full supply voltage reached
ms
zation from Power-up within1msfrompower-up. Shortcycles
(cold start) exist prior to frequency stabilization.
Zo
AC Output Impedance Average value during switching
transition. Used for determining series
termination value.
13.±
13.±
:
Notes:
4. The W137 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is 14 pF;
this includes typical stray capacitance of short PCB traces to crystal.
±. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
Rev 1.0,November 24, 2006
Page 6 of 8
SPECTRALINEAR [ SPECTRALINEAR INC ]
