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CY28349OCT 参数 Datasheet PDF下载

CY28349OCT图片预览
型号: CY28349OCT
PDF下载: 下载PDF文件 查看货源
内容描述: FTG的Intel㈢ Pentium㈢ 4的CPU和芯片组 [FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 20 页 / 233 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28349  
Data Byte 8 (continued)  
Power On  
Default  
Bit  
Bit 5  
Pin#  
--  
Name  
WD_TIMER4  
Pin Description  
These bits store the time-out value of the Watchdog Timer.  
The scale of the timer is determine by the prescaler.  
The timer can support a value of 150 ms to 4.8 sec when  
the pre-scaler is set to 150 ms. If the prescaler is set to  
2.5 sec, it can support a value from 2.5 sec to 80 sec.  
When the Watchdog Timer reaches “0,” it will set the  
WD_TO_STATUS bit and generate Reset if RST_EN_WD  
is enabled.  
1
1
1
1
1
Bit 4  
Bit 3  
Bit 2  
Bit 1  
--  
WD_TIMER3  
WD_TIMER2  
WD_TIMER1  
WD_TIMER0  
--  
--  
--  
Bit 0  
--  
WD_PRE_SCALER  
0 = 150 ms  
1 = 2.5 sec  
0
Data Byte 9  
Power On  
Default  
Bit  
Pin#  
Name  
Pin Description  
Bit 7  
--  
48MHz_DRV  
48MHz and 24_48MHz clock output drive strength  
0 = Normal  
1 = High Drive  
0
(Recommend to set to high drive if this output is being used  
to drive both USB and SIO devices in Intel Brookdale - G  
platforms)  
Bit 6  
Bit 5  
Bit 4  
--  
--  
--  
PCI_DRV  
PCI clock output drive strength  
0 = Normal  
1 = High Drive  
0
0
0
3V66_DRV  
RST_EN_WD  
3V66 clock output drive strength  
0 = Normal  
1 = High Drive  
This bit will enable the generation of a Reset pulse when a  
watchdog timer time-out occurs.  
0 = Disabled  
1 = Enabled  
Bit 3  
Bit 2  
Bit 1  
--  
--  
--  
RST_EN_FC  
WD_TO_STATUS  
WD_EN  
This bit will enable the generation of a Reset pulse after a  
0
0
0
frequency change occurs.  
0 = Disabled  
1 = Enabled  
Watchdog Timer Time-out Status bit  
0 = No time-out occurs (Read); Ignore (Write)  
1 = time-out occurred (Read); Clear WD_TO_STATUS  
(Write)  
0 = Stop and reload Watchdog Timer  
1 = Enable Watchdog Timer. It will start counting down after  
a frequency change occurs.  
Note: CY28349 will generate system reset, reload a  
recovery frequency, and lock itself into a recovery  
frequency mode after a Watchdog Timer time-out occurs.  
Underrecoveryfrequencymode, CY28349willnotrespond  
to any attempt to change output frequency via the SMBus  
control bytes. System software can unlock CY28349 from  
its recovery frequency mode by clearing the WD_EN bit.  
Bit 0  
--  
Reserved  
Reserved  
0
Rev 1.0,November 24, 2006  
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