CY2210
Pin Summary
Name
Pins
Description
VSSREF
VDDREF
VSSPCI
1
3.3V Reference ground
3.3V Reference voltage supply
3.3V PCI ground
4
7, 13, 19
10, 16
20, 24
23, 27
29
VDDPCI
3.3V PCI voltage supply
3.3V AGP ground
VSSAGP
VDDAGP
VSSUSB
VDDUSB
VSSCPU
VDDCPU
VSSCPU/2
VDDCPU/2
VSSAPIC
VDDAPIC
AVSS
3.3V AGP voltage supply
3.3V USB ground
31
3.3V USB voltage supply
2.5V CPU ground
40, 44
43, 47
48
2.5V CPU voltage supply
2.5V CPU/2 ground
51
2.5V CPU/2 voltage supply
2.5V APIC ground
52
56
2.5V APIC voltage supply
Analog ground to PLL and Core
Analog voltage supply to PLL and Core
Reference crystal input
Reference crystal feedback
CPU clock outputs
38
AVDD
XTALIN[1]
XTALOUT[1]
39
5
6
CPUCLK [0–3] 41, 42, 45, 46
PCICLK [1–7]
PCICLK_F
9, 11, 12, 14, 15, 17, 18
PCI clock outputs, synchronously running at 33.33 MHz
Free running PCI clock
8
CPUCLK/2
49, 50
CPU/2 clock outputs, drive memory clock generator
AGP clock outputs, running at 66.66 MHz
AGPCLK [0–3] 21, 22, 25, 26
APICCLK [0–2] 53, 54, 55
APIC clock outputs, running at 16.67 MHz
REFCLK [0–1]
USBCLK
CPU_STOP
PCI_STOP
PWR_DWN
SPREAD
SEL1
2, 3
30
36
37
35
34
33
32
28
Reference clock outputs, 14.318 MHz
48-MHz USB clock output
Active LOW input, disables CPU and AGP clocks when asserted
Active LOW input, disables PCI clocks when asserted
Active LOW input, powers down part when asserted
Active LOW input, enables spread spectrum when asserted
CPU frequency select input (See Function Table)
CPU frequency select input (See Function Table)
CPU frequency select input (See Function Table)
SEL0
SEL133
Note:
1. For best accuracy, use a parallel-resonant crystal, C
= 18 pF. For crystals with different C
, please refer to the application note, “Crystal Oscillator Topics.”
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Rev 1.0,November 25, 2006
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