Si510/511
Table 2. Output Clock Frequency Characteristics
VDD = 1.8 V ±5%, 2.5 or 3.3 V ±10%, TA = –40 to +85 oC
Parameter
Symbol
Test Condition
Min
0.1
Typ
—
—
—
—
—
—
—
—
—
Max
212.5
250
+30
+50
+100
+20
+25
+50
10
Unit
MHz
MHz
ppm
ppm
ppm
ppm
ppm
ppm
ms
Nominal Frequency
F
F
CMOS, Dual CMOS
O
O
LVDS/LVPECL/HCSL
0.1
Total Stability*
Frequency Stability Grade C
Frequency Stability Grade B
Frequency Stability Grade A
Frequency Stability Grade C
Frequency Stability Grade B
Frequency Stability Grade A
–30
–50
–100
–20
–25
–50
—
Temperature Stability
Startup Time
Disable Time
T
Minimum V until output
DD
SU
frequency (F ) within specification
O
T
F
10 MHz
O
—
—
—
—
—
—
—
—
5
µs
µs
µs
µs
D
E
F < 10 MHz
40
20
60
O
Enable Time
T
F 10 MHz
O
F < 10 MHz
O
*Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration
(not under operation), and 10 years aging at 40 oC.
4
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