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E0C63B08D 参数 Datasheet PDF下载

E0C63B08D图片预览
型号: E0C63B08D
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.4MHz, MICROCONTROLLER, UUC, DIE]
分类和应用: 时钟外围集成电路
文件页数/大小: 8 页 / 67 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C63B08  
Oscillation Characteristics  
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the follow-  
ing characteristics as reference values.  
OSC1 crystal oscillation circuit  
(Unless otherwise specified: VDD=3.0V, VSS=0V, fOSC1=32.768kHz, CG=25pF, CD=built-in, Ta=25°C)  
Characteristic  
Oscillation start voltage  
Oscillation stop voltage  
Symbol  
Vsta  
Vstp  
Condition  
Min.  
1.1  
1.1  
0.9  
Typ.  
14  
Max.  
Unit  
V
V
V
pF  
ppm  
ppm  
ppm  
ppm  
ppm  
ppm  
V
tsta3sec (VDD)  
tstp10sec  
(VDD)  
Normal mode  
Doubler mode  
Including the parasitic capacity inside the IC (in chip)  
Built-in capacitance (drain)  
Frequency/voltage deviation  
CD  
f/V  
VDD=0.9 to 3.6V  
with VDC switching  
without VDC switching  
10  
5
10  
Frequency/IC deviation  
Frequency adjustment range  
f/IC  
f/CG CG=5 to 25pF  
-10  
30  
20  
8
3.6  
200  
32.768kHz  
76.8kHz  
153.6kHz  
40  
25  
10  
Harmonic oscillation start voltage Vhho  
Permitted leak resistance  
CG=5pF (VDD)  
Between OSC1 and VDD, VSS  
Rleak  
MΩ  
OSC3 CR oscillation circuit  
(Unless otherwise specified: VDD=3.0V, VSS=0V, RCR=120k, Ta=25°C)  
Characteristic  
Oscillation frequency dispersion  
Oscillation start voltage  
Symbol  
fOSC3  
Vsta Normal mode  
Doubler mode  
Condition  
Min.  
-30  
2.2  
0.9  
Typ.  
310kHz  
Max.  
30  
Unit  
%
V
(VDD)  
(VDD)  
V
Oscillation start time  
Oscillation stop voltage  
tsta  
VDD=2.2 to 3.6V (Doubler mode: VDD=0.9 to 2.2V  
)
3
mS  
V
V
Vstp Normal mode  
Doubler mode  
(VDD)  
(VDD)  
2.2  
0.9  
6