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E0C63B07D 参数 Datasheet PDF下载

E0C63B07D图片预览
型号: E0C63B07D
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.4MHz, MICROCONTROLLER, UUC, DIE]
分类和应用: 时钟外围集成电路
文件页数/大小: 12 页 / 105 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C63B07  
Analog Circuit Characteristics and Current Consumption  
(Unless otherwise specified: VDD=3.0V, VSS=0V, fOSC1=32.768kHz, C  
G
=25pF, Ta=25°C, VD1/VC1–VC3 are internal voltage, C  
1
–C  
5
=0.2µF, C  
6
–C  
7
=0.4µF)  
Unit  
V
Characteristic  
LCD drive voltage  
Symbol  
Condition  
Connect 1Mload resistor between VSS and VC1  
(No panel load)  
Connect 1Mload resistor between VSS and VC2  
(No panel load)  
Min.  
0.95  
Typ.  
1.05  
Max.  
1.15  
V
V
V
V
C1  
C2  
C3  
2•VC1  
×0.9  
3•VC1  
×0.9  
0.95  
1.05  
1.10  
1.15  
1.20  
1.25  
1.35  
1.55  
1.90  
1.95  
2.00  
2.05  
2.15  
2.25  
2.45  
2.55  
2•VC1  
+0.1  
3•VC1  
+0.1  
1.15  
1.15  
1.20  
1.25  
1.30  
1.35  
1.45  
1.65  
2.00  
2.05  
2.10  
2.15  
2.25  
2.35  
2.55  
2.65  
100  
2.3  
3.0  
6.0  
3.5  
4.5  
7.5  
8.0  
10.0  
17.0  
2.4  
3.0  
4.5  
10.0  
20.0  
35.0  
130.0  
20.0  
40.0  
70.0  
260.0  
6.0  
V
V
Connect 1Mload resistor between VSS and VC3  
(No panel load)  
SVD voltage  
SVD SVDS0–3="0"  
SVDS0–3="1"  
SVDS0–3="2"  
SVDS0–3="3"  
SVDS0–3="4"  
SVDS0–3="5"  
SVDS0–3="6"  
SVDS0–3="7"  
SVDS0–3="8"  
SVDS0–3="9"  
SVDS0–3="10"  
SVDS0–3="11"  
SVDS0–3="12"  
SVDS0–3="13"  
SVDS0–3="14"  
SVDS0–3="15"  
1.05  
1.10  
1.15  
1.20  
1.25  
1.30  
1.40  
1.60  
1.95  
2.00  
2.05  
2.10  
2.20  
2.30  
2.50  
2.60  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µS  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
SVD circuit response time  
Current consumption  
t
SVD  
I
OP  
During HALT  
32.768kHz  
76.8kHz  
1.2  
1.8  
Normal mode  
LCD power OFF  
During HALT  
153.6kHz  
3.4  
32.768kHz  
76.8kHz  
2.0  
2.7  
Normal mode *1  
LCD power ON  
During HALT  
Doubler mode (VDD=1.2V)  
LCD power ON  
During HALT  
Halver mode (VDD=3.0V)  
LCD power ON  
During execution  
Normal mode *1  
LCD power ON  
153.6kHz  
4.3  
32.768kHz  
76.8kHz  
153.6kHz  
32.768kHz  
76.8kHz  
4.8  
6.0  
10.0  
1.5  
1.8  
1
1
*
*
153.6kHz  
2.5  
32.768kHz  
76.8kHz  
153.6kHz  
400kHz (CR oscillation)  
32.768kHz  
76.8kHz  
6.0  
12.0  
23.0  
85.0  
13.0  
25.0  
45.0  
170.0  
3.5  
During execution  
Doubler mode (VDD=1.2V)  
LCD power ON  
1
1
*
153.6kHz  
400kHz (CR oscillation)  
32.768kHz  
76.8kHz  
During execution  
Halver mode (VDD=3.0V)  
LCD power ON  
*
7.0  
10.0  
18.0  
153.6kHz  
12.0  
1: No panel load. The SVD circuit is OFF.  
6