E0C63256
■ PIN CONFIGURATION
No. Pin name No. Pin name No. Pin name No. Pin name
1
2
3
4
5
6
7
8
9
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
N.C.
17 RESET
18 TEST
19 VSS
20 OSC3
21 OSC4
22 VD1
33 N.C.
34 BZ
49 COM2
50 COM3
51 SEG0
52 SEG1
53 SEG2
54 SEG3
55 SEG4
56 SEG5
57 SEG6
58 SEG7
59 SEG8
60 SEG9
61 SEG10
62 SEG11
63 SEG12
64 N.C.
QFP13-64pin
48
33
35 R00
36 R01
37 R02
38 R03
39 P20
40 P21
41 P22
42 P23
43 K00
44 K01
45 K02
46 K03
47 COM0
48 COM1
49
32
23 VDD
E0C63256
24 AVDD
25 AVREF
26 AVSS
27 N.C.
28 N.C.
29 P40
30 P41
31 P42
32 P43
N.C.
10 N.C.
11 N.C.
12 N.C.
13 N.C.
14 VC1
15 VC2
16 VC3
INDEX
64
17
1
16
N.C. : No Connection
■PIN DESCRIPTION
Pin name
Pin No.
In/Out
Function
V
DD
SS
23
19
–
–
Power (+) supply pin
Power (–) supply pin
V
AVDD
AVSS
AVREF
24
–
Power (+) supply pin for analog circuit system
Power (–) supply pin for analog circuit system
26
–
25
I
Reference voltage input pin for analog circuit system
V
V
D1
22
–
Oscillation/internal logic system regulated voltage output pin
C1, VC2, VC3
14, 15, 16
20
–
LCD system power supply pin 1/3 or 1/2 bias (selected by mask option)
OSC3
I
Crystal/ceramic/CR oscillation/external clock input pin (selected by mask option)
OSC4
21
O
I
Crystal/ceramic/CR oscillation output pin (selected by mask option)
K00–K03
P20–P23
P40–P43
R00
43–46
39–42
29–32
35
Input port
I/O
I/O
O
O
O
O
O
O
O
I
I/O port
I/O port (switching to A/D converter input is possible by software)
Output port
R01
36
Output port
R02
37
Output port (switching to PTOUT signal output is possible by software)
Output port (switching to FOUT signal output is possible by software)
LCD common output pin (1/4, 1/3, 1/2 duty can be selected by software)
LCD segment output pin
R03
38
COM0–COM3
SEG0–SEG19
BZ
47–50
51–63, 1–7
34
Buzzer output pin
RESET
TEST
17
Initial reset input pin
18
I
Testing input pin
3
SEIKO [ SEIKO EPSON CORPORATION ]
