E0C6233
E0C62L33 (Heavy Load Protection Mode)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, C
G
=25pF, VS1/VL1–VL3 are internal voltage, C1–C6=0.1µF)
Characteristic
Internal voltage
Symbol
Condition
Min.
-1.15
Typ.
-1.05
Max.
-0.95
Unit
V
V
V
V
V
L1
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
L2
2•VL1
-0.1
3•VL1
-0.1
2•VL1
×0.85
3•VL1
×0.85
-1.10
100
V
V
L3
SVD voltage
SVD
-1.30
-1.20
V
µS
V
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
t
SVD
V
V
V
IP
Noninverted input (AMPP)
Inverted input (AMPM)
V
SS+0.3
V
DD-0.9
IM
OF
20
mV
mS
Analog comparator
response time
t
AMP
V
IP=-1.1V, VIM=VIP±30mV
3
Current consumption
I
OP
During HALT *1
During operation *1
2.0
8.0
7.0
18.0
µA
µA
Without panel load
1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status.
E0C62A33 (Normal Mode)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, C
Characteristic Symbol Condition
Internal voltage
G=25pF, VS1/VL1–VL3 are internal voltage, C1–C6=0.1µF)
Min.
-1.15
Typ.
-1.05
Max.
-0.95
Unit
V
V
V
V
V
L1
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
L2
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
2•VL1
-0.1
3•VL1
-0.1
2•VL1
×0.9
3•VL1
×0.9
-2.25
100
V
V
L3
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
SVD voltage
SVD
-2.55
-2.40
V
µS
V
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
t
SVD
V
V
V
IP
Noninverted input (AMPP)
Inverted input (AMPM)
V
SS+0.3
V
DD-0.9
IM
OF
10
mV
mS
Analog comparator
response time
t
AMP
V
IP=-1.5V, VIM=VIP±15mV
3
Current consumption
I
OP
During HALT
During operation at 32kHz *1
During operation at 500kHz *1 Without panel load
Without panel load
OSCC="0"
2.0
8.0
135
5.0
15.0
300
µA
µA
µA
1: The SVD circuit and analog comparator are in the OFF status.
E0C62A33 (Heavy Load Protection Mode)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C6=0.1µF)
Characteristic
Internal voltage
Symbol
Condition
Min.
-1.15
Typ.
-1.05
Max.
-0.95
Unit
V
V
V
V
V
L1
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
L2
2•VL1
-0.1
3•VL1
-0.1
2•VL1
×0.9
3•VL1
×0.9
-2.25
100
V
V
L3
SVD voltage
SVD
-2.55
-2.40
V
µS
V
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
t
SVD
V
V
V
IP
Noninverted input (AMPP)
Inverted input (AMPM)
V
SS+0.3
V
DD-0.9
IM
OF
10
mV
mS
Analog comparator
response time
t
AMP
V
IP=-1.5V, VIM=VIP±15mV
3
Current consumption
I
OP
During HALT
During operation at 32kHz *1
During operation at 500kHz *1 Without panel load
Without panel load
OSCC="0"
11.5
16.0
130
35.0
45.0
330
µA
µA
µA
1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status.
7