E0C6244
■ PIN DESCRIPTION
Pin name
Pin No.
In/Out
Function
V
V
V
V
V
DD
SS
S1
119
109
115
I
I
Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated voltage
LCD system power (1/4 or 1/5 bias may be selected by mask option)
LCD system power test terminal
–
–
O
–
I
O
I
O
I
L1–VL5
REF
121–125
120
5, 4, 2, 128–126
117
CA–CF
OSC1
OSC2
OSC3
OSC4
K00–K03, K10–K13
P00–P03, P10–P13
Booster capacitor connecting terminal
Crystal or CR oscillation input terminal (selected by mask option)
Crystal or CR oscillation output terminal (selected by mask option)
Ceramic or CR oscillation input terminal (selected by mask option)
Ceramic or CR oscillation output terminal (selected by mask option)
Input terminal (Use of pull up resistor is selected by mask option)
I/O terminal
116
113
112
80–73
92–81
I/O
P20–P23
R20–R23, R30–R32
R33
R40
R41
R42
R43
SIN
SOUT
SCLK
SEG0–39
108–102
101
O
O
O
O
O
O
I
O
I/O
O
Output terminal
Output terminal (DC or SRDY output may be selected by mask option)
97
96
94
93
72
71
70
Output terminal (DC, CL or FOUT output may be selected by mask option)
Output terminal (DC or FR output may be selected by mask option)
Output terminal (DC, BZ or FOUT output may be selected by mask option)
Output terminal (DC or BZ output may be selected by mask option)
Serial interface input terminal
Serial interface output terminal
Serial interface clock input/output terminal
LCD segment output terminal
67, 65–40, 38
36, 34–24
7–22
COM0–15
RESET
TEST
O
I
I
LCD common output terminal
Initial reset input terminal
Test input terminal
110
111
■ BASIC EXTERNAL CONNECTION DIAGRAM
X'tal
Crystal oscillator
32.768kHz
LCD PANEL 40 x 16
CI(Max.)=35kΩ
Rfx
Feedback resistor 10MΩ
Cgx
Trimmer capacitor 5~25pF
Ceramic Ceramic oscillator 500kHz~2MHz
Rfc
Feedback resistor 1MΩ
Gate capacitance 100pF
Drein capacitance 100pF
SEG0~SEG39
COM0~COM15
SIN
SERIAL
DEVICE
SOUT
_____
SCLK
Cgc
Cdc
Rcr
R20~R23
R30~R33
R40
OUTPUT
DATA
Resistance for
CR oscillation
20kΩ~100kΩ
R41
P00~P03
P10~P13
P20~P23
I/O
DATA
R42
FOUT
C1~C3 Voltage booster
capacitor (1)~(3)
0.1µF 1
R43
E0C6244
C4
C5
C6
C7
C8
Capacitor between 0.1µF 1
BUZZER
N.C.
VREF
Vss
VDD and VL1
INPUT
DATA
K00~K03
K10~K13
______
RESET
Capacitor between 0.1µF 1
–
+
_____
TEST
VDD and VL2
Capacitor between 0.1µF 1
VDD
VDD and VL4
CFCE CD CC CB CA
VL5 VL4 VL3 VL2 VL1 VS1 OSC4
OSC3 OSC2
OSC1
Capacitor between 0.1µF 1
Rfc
Rfx
C3
C2
C1
VDD and VL5
Capacitor between 0.1µF
X'tal
C7
C6
C5
C4
C8
Ceramic
Cdc
Cgc
Cgx
VDD and VS1
POWER
3~5V
Rcr
1 When the load on the liquid crystal system is large, increase the
capacitance of the voltage booster capacitors (C1–C3) and the
capacitors between VDD and liquid crystal system power (C4–C7).
Note: The above table is simply an example, and is not guaranteed to work.
3
SEIKO [ SEIKO EPSON CORPORATION ]
