5027 series
PAD LAYOUT
(Unit: µm)
ꢀ 5027A×, M×
(for Flip Chip Bonding)
ꢀ 5027B×, N×
(for Wire Bonding (type I))
ꢀ 5027C×, P×
(for Wire Bonding (type II))
(750,690)
Q
(750,690)
(750,690)
VSS
5
6
4
3
Q
5
6
4
3
VSS
VDD
5
6
4
3
Q
Y
Y
Y
INHN
INHN
VDD
VDD
INHN
VSS
1
2
1
2
1
2
(0,0)
(0,0)
(0,0)
XT
XTN
XTN
XT
XT
XTN
X
X
X
Chip size: 0.75 × 0.69mm
Chip thickness: 130 15ꢀm
Chip size: 0.75 × 0.69mm
Chip thickness: 130 15ꢀm
PAD size: 90ꢀm
Chip size: 0.75 × 0.69mm
Chip thickness: 130 15ꢀm
PAD size: 90ꢀm
Chip base: V level
PAD size: 90ꢀm
Chip base: V level
Chip base: V level
SS
SS
SS
PAD DIMENSIONS PIN DESCRIPTION
Pad dimensions [µm]
Pad No.
Pad No.
Pin
Name
Description
5027A× 5027B× 5027C×
5027M× 5027N× 5027P×
X
Y
1
2
3
229
520
636
114
114
304
1
2
3
2
1
6
1
2
5
XT
Amplifier input
Amplifier output
Crystal connection pins. Crystal is connected
between XT and XTN.
XTN
VDD (+) supply voltage
–
Output frequency determined by internal circuit
to one of f , f /2, f /4, f /8, f /16, f /32, f /64
4
5
6
636
114
114
531
531
304
4
5
6
5
4
3
4
3
6
Q
Output
O
O
O
O
O
O
O
VSS
INHN
(–) ground
–
Output state
control input
High impedance when LOW (oscillator stops).
Power-saving pull-up resistor built-in.
BLOCK DIAGRAM
For Fundamental Oscillator
For 3rd Overtone Oscillator
VDD VSS
VDD VSS
INHN
INHN
VReg
VReg
RF
RF
1
CMOS
Q
CMOS
Q
N
XT
XT
R
D
CD
R
D
CD
(N=1, 2, 4, 8, 16, 32, 64)
CG
CG
XTN
XTN
SEIKO NPC CORPORATION —3
SEIKO [ SEIKO EPSON CORPORATION ]
