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RT7273-04 参数 Datasheet PDF下载

RT7273-04图片预览
型号: RT7273-04
PDF下载: 下载PDF文件 查看货源
内容描述: [3-CH, 18V, Synchronous Step-Down Converter]
分类和应用:
文件页数/大小: 23 页 / 329 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT7273  
Parameter  
Symbol  
Test Conditions  
LIM1 = 37k  
Min  
2.4  
Typ  
3
Max  
--  
Unit  
R
Current Limit CH 1  
IOC_CH1  
A
RLIM1 = 50k  
3.4  
4
--  
RLIM1 = 63k  
4.25  
1.6  
5
--  
RLIM2, LIM3 = 44k  
RLIM2, LIM3 = 69k  
RLIM2, LIM3 = 94k  
2
--  
Current Limit CH 2, CH 3 IOC_CH2, CH3  
2.55  
3.4  
3
--  
A
4
--  
Regulation  
Line Regulation  
VIN = 4.5V to 18V, IOUT = 1000mA  
IOUT = 10% to 90%, IOUT_MAX  
--  
--  
0.5  
0.5  
--  
--  
%VOUT  
%VOUT  
/A  
Load Regulation  
Error Amplifier  
Error Amplifier  
GEA  
--  
--  
250  
4
--  
--  
A/V  
Transconductance  
Comp to Current Sense  
GCS  
A/V  
Transconductance  
Power Good Reset Generator  
Output Falling (device will be  
--  
--  
85  
90  
--  
--  
disabled after tON_HICCUP  
)
Under-Voltage Threshold VUV_CHx  
%
Output Rising (PGOOD will be  
asserted)  
Under-Voltage Deglitch  
tUV_DEGLITCH  
Time  
Each Channel Buck  
--  
--  
10  
10  
--  
--  
ms  
ms  
Hiccup Mode On-Time  
tON_HICCUP  
VUV_CHx asserted  
All Bucks disable during  
tOFF_HICCUP before re-start is  
attempted.  
Hiccup Mode Off-Time  
tOFF_HICCUP  
--  
--  
15  
--  
--  
ms  
ms  
Power good delay time after all  
bucks power-up successfully  
Power Good  
tPGOOD  
640  
Thermal Shutdown  
Thermal Shutdown  
Threshold  
TSD  
--  
--  
150  
20  
--  
--  
°C  
°C  
Thermal Shutdown  
Hysteresis  
TSD  
Note 1. Stresses beyond those listed Absolute Maximum Ratingsmay cause permanent damage to the device. These are  
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in  
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may  
affect device reliability.  
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is  
measured at the exposed pad of the package.  
Note 3. Devices are ESD sensitive. Handling precaution is recommended.  
Note 4. The device is not guaranteed to function outside its operating conditions.  
Copyright 2014 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
www.richtek.com  
8
DS7273-04 October 2014