RT7257D
Parameter
Logic-High VIH
Logic-Low VIL
Symbol
Test Conditions
Min
2
Typ
--
Max
18
Unit
EN Input Threshold
Voltage
V
--
--
0.4
Input Under Voltage Lockout
Threshold
VUVLO
VIN Rising
3.8
--
4.2
4.5
--
V
Input Under Voltage Lockout
Hysteresis
VUVLO
320
mV
Soft-Start Current
Soft-Start Period
Thermal Shutdown
ISS
tSS
TSD
VSS = 0V
--
--
--
6
--
--
--
A
ms
C
CSS = 0.1F
13.5
150
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS7257D-05 October 2016
www.richtek.com
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