RT6908
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Logic Inputs (SDA, SCL, EN, EN_I2C)
Input High Voltage
V
1.7
--
--
--
--
0.6
1
V
V
IH
Input Low Voltage
V
IL
Input Leakage Current
Input Capacitance
I , I
IH IL
V
= 0 or 3.3V
−1
--
0.01
5
μA
pF
V
IN
--
SDA Output Low Voltage
V
OL
I
= 6mA
--
0.3
--
SINK
2
I C Timing Characteristics
Serial-Clock Frequency
f
0
--
--
400
--
kHz
SCL
Bus Free Time Between STOP
and START Conditions
Hold Time (Repeated) START
Condition
t
1.3
μs
BUF
t
0.6
--
--
μs
HD, STA
SCL Pulse-Width Low
SCL Pulse-Width High
t
1.3
0.6
--
--
--
--
μs
μs
LOW
t
HIGH
Setup Time for a Repeated
START Condition
t
0.6
--
--
μs
SU, STA
Data Hold Time
Data Setup Time
t
0
--
--
800
--
ns
ns
HD, DAT
t
100
20 +
0.1C
20 +
0.1C
20 +
0.1C
SU, DAT
SDA and SCL Receiving Rise
Time
t
R
--
--
--
300
300
250
ns
ns
ns
B
SDA and SCL Receiving Fall Time
SDA Transmitting Fall Time
t
F
B
t
F
B
Setup Time for STOP Condition
Bus Capacitance
t
0.6
--
--
--
--
--
μs
pF
ns
SU, STO
C
400
50
B
Pulse Width of Suppressed Spike
Reset Voltage Detector
t
SP
--
AVIN Minimum Voltage for
RSTB
Minimum Operating Voltage
2.2
--
--
V
VDET Detecting Threshold
VDET Threshold Hysteresis
RSTB Output Low Voltage
RSTB Leakage Current
CRST Charge Current
CRST Threshold
V
VDET Falling
--
--
--
--
--
--
0.6
100
--
--
--
V
mV
V
TH
ΔV
TH
V
OL
I
= 500μA
SINK
0.3
0.1
--
I
V
= 5.0V
RSTB
0.01
8
μA
μA
V
LEAK
I
CRST
V
CRST
1.25
--
Boost Converter (AVDD)
Register Address = ”00h”, 6
bits, AVDD = (12.7V to 19V)
[00h to 3Fh]
Adjustable Output Voltage Range
V
12.7
--
19
V
V
AVDD
AVDD Regulation Voltage
(Default)
V
AVDD
No load
15.444
15.6
15.756
Oscillator Frequency
Maximum Duty Cycle
f
600
--
750
90
900
--
kHz
%
OSC
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
www.richtek.com
7
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
