RT6543A/B
Pin No.
Pin Name
Pin Function
Low-side gate driver output pin. Connect this pin to the gate of low-side
MOSFET. Notice, DO NOT connect the resistor RG_EXT between LGATE
and gate terminal of low-side MOSFET, otherwise it might cause undesired
shoot-through since the LGATE voltage is monitored for shoot-through
protection.
13
LGATE
Power GND. AGND and PGND are connected with a short trace and at only
one point to reduce circulating currents.
14
15
PGND
PVCC
Bias voltage for internal gate driver. The required bias voltage for PVCC is
5V typ. For avoiding noise disturbance, the supplied bias voltage must be
stable, Beside, a RC filter (R = 2.2/0603 and C = 1F/0603) from bias
voltage to PVCC pin is necessary which should be placed as close as
physically possible to PVCC pin.
Bias voltage for control logic. The required bias voltage for VCC is 5V typ.
For avoiding noise disturbance, the supplied bias voltage must be stable,
Beside, a RC filter (R = 2.2/0603 and C = 1F/0603) from bias voltage to
VCC pin is necessary which should be placed as close as physically
possible to VCC pin.
16
VCC
VCCIN_AUX VID control signal. Adjust AUX output voltage(0V, 1.1V, 1.65V
and 1.8V)
17
18
AUX_VID0
AUX_VID1
VCCIN_AUX VID control signal. Adjust AUX output voltage(0V, 1.1V, 1.65V
and 1.8V)
Enable control input. As voltage is lower than 0.3V, RT6543A/B is in
shutdown mode and all power rails are disabled. As RT6543A/B is higher
than 1V, RT6543A/B is woken up.
19
20
EN
System voltage sense. Connect this pin to input voltage for UVLO monitor
and controller’s on-time setting. For avoiding any noise to disturb on-time
setting, a RC filter (R = 2.2/0603 and C = 0.1F/0603) is required from
input voltage to VSYS.
VSYS
Exposed pad for package. Electrically isolated. Directly solder to the large
PGND plane and use thermal vias to connect PGND of other layers for
thermal resistor reduction
21 (Exposed pad) GND
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DS6543A/B-01 March 2020
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