RT6308A
Pin Configuration
Marking Information
QV= : Product Code
(TOP VIEW)
YMDNN : Date Code
QV=YM
DNN
12 11 10
1
9
8
7
6
BOOT
LX
EN
5
VIN
2
3
4
PGND
LX
UQFN-12HL 3x3 (FC)
Functional Pin Description
Pin No.
Pin Name
Pin Function
Boot-strap pin. Supply high side gate driver. A 0.1F ceramic capacitor and
at least 10 RBOOT are connected between this pin and LX pin.
1
BOOT
2,3
4
LX
Inductor pin. Connect this pin to the switching node of inductor.
Power ground.
PGND
VIN
5
Input pin. Decouple this pin to GND pin with at least 10F ceramic cap.
Enable control. Pull this pin high to turn on the Buck. Do not leave this pin
floating. EN pin will also be used to set USM mode, when EN pin voltage is
between 2.3V and 23V, it will enter USM mode, if EN pin voltage is between
0.8V and 1.7V, then it is normal mode.
6
EN
Power good indicator. Open drain output when the output voltage is higher
than 90% of regulation point.
7
8
9
PGOOD
AGND
VCC
Analog ground.
5V linear regulator output for internal control circuit. A capacitor (typical 1F)
should be connected to AGND. Don’t connect to external Load.
Output feedback pin. Connect this pin to the center point of the output
resistor divider to program the output voltage.
10
11
12
FB
Bypass input for the internal LDO. BYP is externally connected to the output
of switching regulator. When the BYP voltage rises above the bypass switch
turn-on threshold, the LDO regulator shuts down and the VCC pin is
connected to the BYP pin through an internal switch.
BYP
ILMT
Current limit setting pin. The current limit is set to 8A, 10A or 12A when this
pin is pull low, floating or pull high respectively.
Copyright 2019 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS6308A-00 October 2019
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
