RT5796A
Parameter
Over-Temperature Threshold
Logic-High VIH
Logic-Low VIL
Symbol
Test Conditions
Min
--
Typ
150
--
Max
--
Unit
°C
1.5
--
--
Enable Input Voltage
V
--
0.4
--
FB Rising
FB Falling
--
90
85
PG Pin Threshold (relative to
VOUT
%
)
--
--
PG Open-Drain Impedance
(PG = low)
--
--
100
Soft-Start Time
TSS
--
--
1.2
--
--
ms
ns
Minimum Off Time
120
Output Discharge Switch On
Resistance
--
1.8
--
k
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured at TA = 25C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. The first
layer of copper area is filled. JC is measured at the top of the package.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
6
DS5796A-04 December 2019