Pin Descriptions
Pin
1
Name
Description
GND1
VCC1
VCC3
GND1 is the RF ground pin.
2
VCC1 is a positive supply voltage pin. VCC1 is decoupled with a ferrite bead and bypassed by an RF capacitor.
VCC3 is a positive supply voltage pin. VCC3 is bypassed by an RF capacitor.
3
This pin controls the peak detector operation. A capacitor between this pin and ground sets the peak detector attack and
decay times, which have a fixed 1:1000 ratio. For most applications, these time constants should be coordinated with the
base-band time constant. For a given base-band capacitor CBBO , the capacitor value CPKD is:
C
PKD = 2.0* CBBO , where CBBO and CPKD are in pF
4
PKDET
A ±10% ceramic capacitor should be used at this pin. This time constant will vary between tPKA and 1.5* tPKA with varia-
tions in supply voltage, temperature, etc. The capacitor is driven from a 200 ohm “attack” source, and decays through a
200 K load. The peak detector is used to drive the “dB-below-peak” data slicer and the AGC release function. The peak
detector capacitor is discharged in the receiver power-down (sleep) mode and in the transmit modes.
BBOUT is the receiver base-band output pin. This pin drives the CMPIN pin through a coupling capacitor CBBO for internal
data slicer operation. The time constant tBBC for this connection is:
tBBC = 0.1CBBO , where tBBC is in µs and CBBO is in pF
A ±10% ceramic capacitor should be used between BBOUT and CMPIN. The time constant can vary between tBBC and
1.8*tBBC with variations in supply voltage, temperature, etc. The optimum time constant in a given circumstance will
depend on the data rate, data run length, and other factors as discussed in the ASH Transceiver Designer’s Guide.
CBBO = 11.2*SPMAX, where SPMAX is the maximum signal pulse width in µs and CBBO is in pF
The output from this pin can also be used to drive an external data recovery process (DSP, etc.). The nominal output
impedance of this pin is 1 K. When the receiver RF amplifiers are operating at a 50%-50% duty cycle, the BBOUT signal
changes about 10 mV/dB, with a peak-to-peak signal level of up to 450 mV. The signal at BBOUT is riding on a 1.5 Vdc
value that varies somewhat with supply voltage and temperature, so it should be coupled through a capacitor to an exter-
nal load. A load impedance of 50 K to 500 K in parallel with no more than 10 pF is recommended. When an external data
recovery process is used with AGC, BBOUT must be coupled to the external data recovery process and CMPIN by sepa-
rate series coupling capacitors. The AGC reset function is driven by the signal applied to CMPIN. When the transceiver is
in power-down (sleep) or in a transmit mode, the output impedance of this pin becomes very high, preserving the charge
on the coupling capacitor.
5
BBOUT
This pin is the input to the internal data slicers. It is driven from BBOUT through a coupling capacitor. The input impedance
of this pin is 100 K.
6
7
CMPIN
RXDATA is the receiver data output pin. It is a CMOS output. The signal on this pin can come from one of two sources. The
default source is directly from the output of the data slicer circuit. The alternate source is from the radio’s internal data and
clock recovery circuit. When the internal data and clock recovery circuit is used, the signal on RXDATA is switched from the
output of the data slicer to the output of the data and clock recovery circuit when a packet start symbol is detected. Each
recovered data bit is then output on the rising edge of a RXDCLK pulse (Pin 14), and is stable for reading on the falling
edge of the RXDCLK pulse.
RXDATA
The transmitter RF output voltage is proportional to the input current to this pin. A resistor in series with the TXMOD input
is normally used to adjust the peak transmitter output. Full transmitter power (10 mW) requires about 360 µA of drive cur-
rent. The transmitter output power PO for a 3 Vdc supply voltage is approximately:
PO = 101*(ITXM)2, where PO is in mW and the modulation current ITXM is in mA
8
TXMOD
The practical power control range is 10 to -50 dBm. A ±5% TXMOD resistor value is recommended. Internally, this pin is
connected to the base of a bipolar transistor with a small emitter resistor. The voltage at the TXMOD input pin is about 0.87
volt with 315 uA of drive current. This pin accepts analog modulation and can be driven with either logic level data pulses
(unshaped) or shaped data pulses.
This pin is the receiver low-pass filter bandwidth adjust. The filter bandwidth is set by a resistor RLPF between this pin and
ground. The resistor value can range from 510 K to 3 K, providing a filter 3 dB bandwidth fLPF from 5 to 600 kHz. The resis-
tor value is determined by:
LPF = (0.0006*fLPF)
-1.069 where RLPF is in kilohms, and fLPF is in kHz
9
LPFADJ
GND2
R
A ±5% resistor should be used to set the filter bandwidth. This will provide a 3 dBfilter bandwidth between fLPF and
1.3* fLPF with variations in supply voltage, temperature, etc. The filter provides a three-pole, 0.05 degree equiripple phase
response.D input is normally used to
10
GND2 is an IC ground pin.
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