168-pin Low Latency, Low Profile SDRAM DIMMs
128MB, 256MB
Preliminary Data Sheet
256MB ECC DIMM Functional Block Diagram – SM25609ALDT
S0#
S1#
Clock Wiring
CK0
5 SDRAM
CK1
CK2
CK3
5 SDRAM
4 SDRAM+3.3 pf
4 SDRAM+3.3 pf
DQMB0
DQ(7:0)
DQMB4
DQ(39:32)
U0
U1
U2
U9
U5
U6
U14
U15
10
CK0-3
SDRAMs
DQMB1
DQMB5
U10
U11
DQ(15:8)
DQ(47:40)
SCL
SDA
Serial PD
SA0-2
WP
47K
Note:
DQ(15:8)
SDRAM U11 DQM input
is wired to DQMB5.
BA0
BA1
BA0 SDRAM U0-17
BA1 SDRAM U0-17
A0-A11 SDRAM U0-17
Vdd SDRAM U0-17
Vss SDRAM U0-17
S2#
S3#
A0-A11
Vdd
Vss
DQMB2
DQMB6
U3
U4
U12
U13
U7
U8
U16
U17
DQ(23:16)
DQ(55:48)
RAS#
CAS#
WE#
RAS# SDRAM U0-17
CAS# SDRAM U0-17
WE# SDRAM U0-17
CKE SDRAM U0-8
DQMB3
DQ(31:24)
DQMB7
CKE0
DQ(63:56)
CKE1
CKE SDRAM U9-17
Note:
All DQ resistor values are 10 ohms.
All CK resistor values are 10 ohms.
U0-U17 are HYB39S128800CT-7.
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com
2001 Enhanced Memory Systems. All rights reserved.
The information contained herein is subject to change without notice.
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Revision 1.0