FM3104/16/64/256
FRAM
Array
2-Wire
Interface
A1, A0
SCL
LockOut
SDA
LockOut
Special
Function
Registers
RST
Watchdog
LV Detect
RTC Registers
RTC
S/N
X1
X2
PFI
RTC Cal.
+
-
1.2V
CAL/PFO
512Hz
CNT1
CNT2
Event
-
2.5V
+
Counters
VDD
Switched Power
VBAK
Battery Backed
Nonvolatile
Figure 1. Block Diagram
Pin Descriptions
Pin Name
Type Pin Description
A0, A1
Input
Device select inputs are used to address multiple memories on a serial bus. To select
the device the address value on the two pins must match the corresponding bits
contained in the device address. The device select pins are pulled down internally.
Event Counter Inputs: These battery-backed inputs increment counters when an edge is
detected on the corresponding CNT pin. The polarity is programmable. These pins
should not be left floating. Tie to ground if pins are not used.
CNT1, CNT2
Input
CAL/PFO
X1, X2
Output In calibration mode, this pin supplies a 512 Hz square-wave output for clock
calibration. In normal operation, this is the early power-fail output.
I/O
32.768 kHz crystal connection. When using an external oscillator, apply the clock to
X1 and a DC mid-level to X2 (see Crystal Oscillator section for suggestions).
Active low reset output with weak pull-up. Also input for manual reset.
Serial Data & Address: This is a bi-directional line for the two-wire interface. It is
open-drain and is intended to be wire-OR’d with other devices on the two-wire bus.
The input buffer incorporates a Schmitt trigger for noise immunity and the output
driver includes slope control for falling edges. A pull-up resistor is required.
Serial Clock: The serial clock line for the two-wire interface. Data is clocked out of the
part on the falling edge, and in on the rising edge. The SCL input also incorporates a
Schmitt trigger input for noise immunity.
/RST
SDA
I/O
I/O
SCL
Input
Input
PFI
Early Power-fail Input: Typically connected to an unregulated power supply to detect
an early power failure. This pin should not be left floating.
VBAK
Supply Backup supply voltage: A 3V battery or a large value capacitor. If VDD<3.6V and no
backup supply is used, this pin should be tied to VDD. If VDD>3.6V and no backup
supply is used, this pin should be left floating and the VBC bit should be set.
Supply Supply Voltage
VDD
VSS
Supply Ground
Rev. 3.2
July 2010
Page 3 of 25
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
