SETUP
pin 15
Active low input to enter configuration or diagnostic test mode. It has a 47kΩ pull-ups to Vcc
TXD
pin 14
This is inverted RS232 data input at 5V CMOS logic level. It can be directly interfaced to data output of
a UART in a microcontroller or to a TXD pin of an RS232 serial port via a MAX232 or equivalent
RS232-CMOS level converter. TXD does not have an internal pull-up. If TDH2 is used in Receive only
mode, TXD should be tied to Vcc.
NC
pin 13
There is no pin in this position.
RXD
pin 12
This is inverted RS232 data output at 5V CMOS logic level. It can be directly interfaced to data input of
a UART in a microcontroller or to a RXD pin of an RS232 serial port via a MAX232 or equivalent
RS232-CMOS level converter.
STATUS
pin 11
This pin goes high when valid data is present in the receive buffer. It can be used to trigger an
interrupt in the host to download received data packet instead of waiting for it. It can be also be used as
a primitive CTS signal. It is inverted RS232 data output at 5V CMOS logic level. It can be directly
interfaced to an input of a microcontroller as a Data Detect (DD) or to CTS, DSR, DCD pins of an RS232
serial port via a MAX232 or equivalent RS232-CMOS level converter. This is can only be used to
prevent host from uploading any data before downloading already received data, because transmission
is prioritised over reception and any data to be transmitted will erase received data which is in the
common buffer.
Serial interface – modem operation
To connect to a true RS232 device, inverting RS232-CMOS level shifters must be used. Maxim MAX232
or equivalent are ideal, but simple NPN transistor switches with pull-ups often suffice. With typical
microcontrollers and UARTs, direct connection is possible.
The Radio / data stream interface
A 32 byte software FIFO is implemented in both the transmit and receive sub-routine. At the
transmitting end this is used to allow for the transmitter start up time (about 3mS), while on receiving
end it buffers arriving packets to the constant output data rate. All timing and data formatting tasks
are handled by the internal firmware. The user need not worry about keying the transmitter before
sending data as the link is entirely transparent.
For transmission across the radio link data is formatted into packets, each comprising 3 bytes of data
and a sync code. If less than 3 bytes are in the transmit end FIFO then a packet is still sent, but idle
codes replaces the unused bytes. When the transmit end FIFO is completely emptied, then the
transmitter is keyed off.
Operation: Radio interface.
Raw data is not fed to the radios. A coding operation in the transmit sub-routine, and decoding in the
receiver, isolate the AC coupled, potentially noisy baseband radio environment from the datastream.
The radio link is fed a continuous tone by the modem. As in bi-phase codes, information is coded by
varying the duration consecutive half-cycles of this tone. In our case half cycles of 62.5us and 31.25us
are used. In idle (or 'preamble') state, a sequence of the longer cycles is sent (resembling an 8KHz tone).
A packet comprises the Synchronising (or address) part, followed by the Data part, made up of twelve
Groups (of four half cycles duration). Each Group encodes 2 data bits, so one byte is encoded by 4
Groups.
Radiometrix Ltd
TDH2 Data Sheet
page 4
RADIOMETRIX [ RADIOMETRIX LTD ]
