P4C1024
AC CHARACTERISTICS—WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-15
-20
-25
-35
-45
-55
-70
-85
-100
-120
Symbol
Parameter
Unit
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tWC
Write Cycle Time 15
Chip Enable
20
15
25
18
35
22
45
30
55
35
70
45
85
50
100
60
120
75
ns
tCW
Time to End of
Write
12
ns
Address Valid to
tAW
tAS
tWP
tAH
12
0
15
0
20
0
25
0
35
0
45
0
60
0
70
0
85
0
100
0
ns
ns
ns
ns
End of Write
Address Set-up
Time
Write Pulse
Width
Address Hold
Time
12
0
15
0
18
0
22
0
25
0
30
0
40
0
45
0
55
0
70
0
Data Valid to
tDW
tDH
tWZ
7
0
8
0
10
0
15
0
20
0
25
0
30
0
35
0
45
0
60
0
ns
ns
End of Write
Date Hold Time
Write Enable to
Output in High Z
8
10
11
15
18
20
25
30
40
50 ns
Output Active
from End of
Write
tOW
3
3
3
3
3
3
3
3
3
3
ns
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)(11)
Notes:
11. CE1 and WE must be LOW, and CE HIGH for WRITE cycle.
14. Write Cycle Time is measured from the last valid address to the first
transitioning address.
12. OE is LOW for this WRITE cycle to 2show tWZ and t
.
13. If CE1 goes HIGH, or CE goes LOW, simultaneouslyOwWith WE HIGH,
the output remains in a2high impedance state.
Document # SRAM124 REV A
Page 6 of 14
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
