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P4C1024L70CWI 参数 Datasheet PDF下载

P4C1024L70CWI图片预览
型号: P4C1024L70CWI
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗128K ×8 CMOS静态RAM [LOW POWER 128K x 8 CMOS STATIC RAM]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 11 页 / 281 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
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P4C1024L  
CAPACITANCES(4)  
(VCC = 5.0V, TA = 25°C, f = 1.0 MHz)  
Unit  
pF  
Symbol  
Parameter  
Test Conditions  
VIN = 0V  
Max  
7
CIN  
Input Capacitance  
VOUT = 0V  
COUT  
9
pF  
Output Capacitance  
POWER DISSIPATION CHARACTERISTICS VS. SPEED  
*
**  
Temperature  
Symbol  
Parameter  
Unit  
-55  
-70  
-55  
-70  
Range  
mA  
15  
Commercial  
70  
70  
15  
ICC  
Dynamic Operating Current  
mA  
25  
Industrial  
85  
85  
25  
*Tested with outputs open and all address and data inputs changing at the maximum write-cycle rate.  
The device is continuously enabled for writing, i.e., CE2 VIH (min), CE1 and WE VIL (max), OE is high. Switching  
inputs are 0V and 3V.  
**As above but @ f=1 MHz and VIL/ VIH = 0V/ VCC.  
AC ELECTRICAL CHARACTERISTICS - READ CYCLE  
(Over Recommended Operating Temperature & Supply Voltage)  
-70  
-55  
Parameter  
Unit  
ns  
Symbol  
Max  
Min  
Max  
Min  
tRC  
Read Cycle Time  
Address Access Time  
55  
70  
55  
55  
70  
70  
ns  
tAA  
Chip Enable Access  
Time  
tAC  
tOH  
ns  
ns  
ns  
Output Hold from  
Address Change  
5
5
Chip Enable to  
Output in Low Z  
tLZ  
10  
10  
Chip Disable to  
Output in High Z  
tHZ  
ns  
ns  
25  
35  
20  
30  
Output Enable Low  
to Data Valid  
tOE  
Output Enable Low to  
Low Z  
tOLZ  
5
0
5
0
ns  
ns  
Output Enable High  
to High Z  
tOHZ  
tPU  
20  
55  
25  
70  
Chip Enable to Power  
Up Time  
ns  
ns  
Chip Disable to  
Power Down Time  
tPD  
Document # SRAM125 REV C  
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