P4C1024
AC CHARACTERISTICS—WRITE CꢁCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-15
-20
-25
-35
-45
-55
-70
-85
-100
-120
Symbol
Parameter
Unit
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tWC Write Cycle Time
15
12
12
0
20
15
15
0
25
18
20
0
35
22
25
0
45
30
35
0
55
35
45
0
70
45
60
0
85
50
70
0
100
60
85
0
120
75
100
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Enable Time
tCW
to End of Write
Address Valid to
tAW
End of Write
Address Set-up
Time
tAS
tWP Write Pulse Width
12
0
15
0
18
0
22
0
25
0
30
0
40
0
45
0
55
0
70
0
tAH Address Hold Time
Data Valid to End
of Write
tDW
7
8
10
0
15
0
20
0
25
0
30
0
35
0
45
0
60
0
tDH Date Hold Time
0
0
Write Enable to
tWZ
8
10
11
15
18
20
25
30
40
50
Output in High Z
Output Active from
End of Write
tOW
3
3
3
3
3
3
3
3
3
3
TIMING WAVEFORM OF WRITE CꢁCLE NO. 1 (WE CONTROLLED)(11)
Notes:
11. CE1 and WE must be LOW, and CE2 HIGH for WRITE cycle.
12. OE is LOW for this WRITE cycle to show tWZ and tOW
14. Write Cycle Time is measured from the last valid address to the first
.
transitioning address.
13. If CE1 goes HIGH, or CE2 goes LOW, simultaneously with WE HIGH,
the output remains in a high impedance state.
Document # SRAM124 REV C
Page 6 of 14
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
