P3C1024L
DATA RETENTION
Symbol
Test Conditions
Min
Unit
Parameter
Max
CE1 ≥ VCC -0.2V, CE2 ≤ 0.2V,
VIN ≥ VCC -0.2V or VIN ≤ 0.2V
VDR
VCC for Data Retention
Data Retention Current
2.0
V
(1)
ICCDR
VDR = 2.0V
10
µA
Chip Deselect to Data
Retention Time
tCDR
See Retention Waveform
0
ns
µs
Operating Recovery Time(2)
100
tR
1. CE1 ≥ VDR -0.2V, CE2 ≥ VDR -0.2V or CE2 ≤ 0.2V; or CE1 ≤ 0.2V, CE2 - 0.2V; VIN ≥ VDR -0.2V or VIN ≤ 0.2V
2. VCC ramp from VDR to VCC (min) > 100 µs for full device operation.
LOW VCC DATA RETENTION WAVEFORM 1 (CE1 CONTROLLED)
LOW VCC DATA RETENTION WAVEFORM 2 (CE2 CONTROLLED)
Document # SRAM132 REV OR
Page 7 of 9
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