May 2007
rev 0.4
ASM3P622S00A/B/J/E/K
Operating Conditions for ASM3P622S00A/B/J/E/K Devices
Parameter
Description
Min
3.0
Max
3.6
+85
30
Unit
V
VDD
Supply Voltage
TA
Operating Temperature (Ambient Temperature)
Load Capacitance
-40
°C
CL
pF
pF
CIN
Input Capacitance
7
Electrical Characteristics for ASM3P622S00A/B/J/E/K
Parameter
Description
Input LOW Voltage1
Input HIGH Voltage1
Input LOW Current
Input HIGH Current
Output LOW Voltage2
Output HIGH Voltage2
Supply Current
Test Conditions
Min
Typ
Max
0.8
Unit
V
VIL
VIH
IIL
2.0
V
VIN = 0V
50
100
0.4
µA
µA
V
IIH
VIN = VDD
VOL
VOH
IDD
Zo
IOL = 8mA
IOH = -8mA
2.4
V
Unloaded outputs
15
23
mA
Ω
Output Impedance
Note: 1. CLKIN input has a threshold voltage of VDD/2
2. Parameter is guaranteed by design and characterization. Not 100% tested in production
Switching Characteristics for ASM3P622S00A/B/J/E/K1
Parameter
Description
Test Conditions
Min
Typ
Max Unit
1/t1
Output Frequency
30pF load
4
20
MHz
Duty Cycle 2 = (t2 / t1) * 100
Output Rise Time 2
Measured at VDD/2
40
50
60
%
t3
t4
t5
t6
Measured between 0.8V and 2.0V
Measured between 2.0V and 0.8V
All outputs equally loaded
2.5
2.5
250
nS
nS
pS
Output Fall Time 2
Output-to-output skew 2
Delay, CLKIN Rising Edge to Measured at VDD /2
CLKOUT Rising Edge 2
Device-to-Device Skew 2
±350
pS
t7
Measured at VDD/2 on the CLKOUT pins
of the device
700
200
1.0
pS
pS
tJ
Cycle-to-cycle jitter 2
PLL Lock Time 2
Loaded outputs
tLOCK
Stable power supply, valid clock presented
on CLKIN pin
mS
Note: 1. All parameters specified with loaded outputs.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production
Low Frequency Timing-Safe™ Peak EMI Reduction IC
6 of 16
Notice: The information in this document is subject to change without notice.