November 2006
rev 1.3
ASM3P2853A
Pin Configuration
50MHz
8
XIN
XOUT
VDD
1
2
3
4
7
6
USB Clock
SSONB
PWDNB
5
VSS
Pin Description
Pin
Name
Pin#
Type
Description
Connection to crystal or external reference frequency input. This pin has dual
functions. It can be connected either to an external crystal or an external
reference clock.
1
XIN
I
Connection to crystal. If using an external reference clock, this pin must be left
unconnected.
2
XOUT
O
3
4
VDD
VSS
P
P
Power supply for the analog and digital blocks
Ground to entire chip.
Power-down control pin. Pull low to enable the power-down mode. Connect to
VDD, if not used.
Digital logic input used to enable spread spectrum function (Active LOW).
Spread spectrum is enabled when LOW, disabled when HIGH.
5
6
PWDNB
SSONB
I
I
USB
Clock
7
8
O
O
Clock output -1 (48MHz unmodulated)
Clock output -2 (50MHz modulated)
50MHz
Peak EMI Reducing Solution
2 of 8
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
