ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
April 2008
rev 1.6
Block Diagram
VDD
D_C SRS FRS
PLL
Modulation
XIN /CLKIN
XOUT
Crystal
Oscillator
Frequency
Divider
Output
Divider
Phase
Detector
Loop
Filter
VCO
Feedback
Divide
ModOUT
VSS
Pin Configuration
XIN / CLKIN
VSS
1
8
XOUT
VDD
2
ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
7
6
5
D_C
FRS
3
4
SRS
ModOUT
Pin Description
Pin#
Pin Name
Type
Description
1
2
XIN / CLKIN
VSS
I
Crystal connection or external Clock input.
Ground to entire chip.
P
I
Digital logic input used to select Down (LOW) or Center (HIGH) spread options.
(Refer Frequency Deviation and Spread Selection Table).
This pin has an internal pull-up resistor.
3
D_C
Spread range select. Digital logic input used to select frequency deviation
(Refer Frequency Deviation and Spread Selection Table).
This pin has an internal pull-up resistor.
4
5
6
SRS
ModOUT
FRS
I
O
I
Spread spectrum clock output
Frequency range select. Digital logic input used to select Input frequency range
(Refer Input/Output Frequency Range Selection Table).
This pin has an internal pull-up resistor.
7
8
VDD
P
Power supply for the entire chip.
Crystal connection. If using an external reference, this pin must be left
unconnected.
XOUT
O
Low Power EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
