欢迎访问ic37.com |
会员登录 免费注册
发布采购

ASM3I2762A-08TT 参数 Datasheet PDF下载

ASM3I2762A-08TT图片预览
型号: ASM3I2762A-08TT
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 13MHz, CMOS, PDSO8, TSSOP-8]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 12 页 / 180 K
品牌: PULSECORE [ PulseCore Semiconductor ]
 浏览型号ASM3I2762A-08TT的Datasheet PDF文件第1页浏览型号ASM3I2762A-08TT的Datasheet PDF文件第2页浏览型号ASM3I2762A-08TT的Datasheet PDF文件第3页浏览型号ASM3I2762A-08TT的Datasheet PDF文件第4页浏览型号ASM3I2762A-08TT的Datasheet PDF文件第6页浏览型号ASM3I2762A-08TT的Datasheet PDF文件第7页浏览型号ASM3I2762A-08TT的Datasheet PDF文件第8页浏览型号ASM3I2762A-08TT的Datasheet PDF文件第9页  
September 2005  
rev 1.6  
ASM3P2762A  
DC Electrical Characteristics for 3.3V Supply  
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)  
Symbol  
VIL  
Parameter  
Min  
VSS - 0.3  
Typ  
-
-
-
Max  
0.8  
VDD + 0.3  
Unit  
V
V
µA  
µA  
mA  
mA  
V
Input low voltage  
Input high voltage  
Input low current  
Input high current  
VIH  
IIL  
IIH  
2.0  
-
-
-
-
-
2.5  
-
-
2.7  
-
-
-35  
35  
-
-
IXOL  
IXOH  
VOL  
VOH  
IDD  
ICC  
VDD  
tON  
XOUT output low current (@0.4V, VDD=3.3V)  
XOUT output high current (@2.5V, VDD=3.3V)  
Output low voltage (VDD = 3.3V, IOL = 8mA)  
Output high voltage (VDD = 3.3V, IOH = 8mA)  
Static supply current*  
Dynamic supply current (3.3V, 10MHz and no load)  
Operating voltage  
Power-up time (first locked cycle after power-up)**  
Output impedance  
3
3
-
-
-
3
3.3  
-
-
0.4  
-
10  
-
3.6  
5
-
V
uA  
mA  
V
mS  
ZOUT  
45  
* PD pin is pulled low  
** VDD and XIN/CLKIN input are stable, PD pin is made high from low.  
AC Electrical Characteristics for 3.3V Supply  
Symbol  
CLKIN  
Parameter  
Min  
6
Typ  
-
Max  
13  
Unit  
MHz  
MHz  
Input frequency  
ModOUT  
Output frequency  
6
-
13  
Input Frequency = 6MHz  
Input Frequency = 13MHz  
-
-
-1.75  
-0.9  
-
-
fd  
Frequency Deviation  
%
tLH*  
Output rise time (measured from 0.8 to 2.0V)  
Output fall time (measured at 2.0V to 0.8V)  
Jitter (cycle to cycle)  
0.5  
0.4  
-
1.0  
0.9  
-
1.4  
1.2  
200  
55  
nS  
nS  
pS  
%
tHL  
tJC  
tD  
*
Output duty cycle  
45  
50  
*tLH and tHL are measured into a capacitive load of 15pF  
Low Power Peak EMI Reducing Solution  
5 of 12  
Notice: The information in this document is subject to change without notice.