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ASM2I9942CG-32-ET 参数 Datasheet PDF下载

ASM2I9942CG-32-ET图片预览
型号: ASM2I9942CG-32-ET
PDF下载: 下载PDF文件 查看货源
内容描述: [Low Skew Clock Driver, 9942 Series, 18 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 0.80 MM PITCH, GREEN, TQFP-32]
分类和应用: 驱动逻辑集成电路
文件页数/大小: 10 页 / 432 K
品牌: PULSECORE [ PulseCore Semiconductor ]
 浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第1页浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第2页浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第3页浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第5页浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第6页浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第7页浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第8页浏览型号ASM2I9942CG-32-ET的Datasheet PDF文件第9页  
May 2005  
ASM2I9942C  
rev 0.2  
AC Characteristics (TA = 0°to 70°C, VCC = 2.5V ± 5%)  
Symbol  
Characteristic  
Min  
Typ  
Max  
200  
2.8  
Unit  
MHz  
nS  
Condition  
Fmax  
Maximum Frequency  
Propagation Delay1  
1.5  
tPLH  
Output-to-output Skew  
150  
350  
Within one bank  
pS  
Any output, Any Bank  
tsk(o)  
tsk(pr)  
tsk(pr)  
dt  
Part–to–Part Skew1, 2  
1.3  
600  
55  
nS  
pS  
%
Part–to–Part Skew1, 3  
Duty Cycle  
45  
Output Rise/Fall Time  
0.2  
1.0  
nS  
tr, tf  
Note: 1.Tested using standard input levels, production tested @ 133 MHz.  
2.Across temperature and voltage ranges, includes output skew.  
3.For a specific temperature and voltage, includes output skew.  
DC Characteristics (TA = 0°to 70°C, VCC = 3.3V ± 5%)  
Symbol  
Characteristic  
Min  
2.4  
Typ  
Max  
VCCI  
0.8  
Unit  
V
V
Condition  
VIH  
Input HIGH Voltage  
VIL  
Input LOW Voltage  
VOH  
VOL  
IIN  
CIN  
CPD  
ZOUT  
ICC  
Output HIGH Voltage  
Output LOW Voltage  
Input Current  
Input Capacitance  
Power Dissipation Capacitance  
Output Impedance  
2.4  
V
V
µA  
pF  
pF  
IOH = –20 mA  
IOL = 20 mA  
0.5  
±200  
4.0  
14  
12  
Per Output  
Maximum Quiescent Supply Current  
0.5  
mA  
AC Characteristics (TA = 0°to 70°C, VCC = 3.3V ± 5%)  
Symbol  
Characteristic  
Min  
Typ  
Max  
250  
2.3  
Unit  
MHz  
nS  
Condition  
Fmax  
Maximum Frequency  
tPLH  
Propagation Delay1  
1.3  
Output-to-output Skew  
150  
350  
Within one bank  
tsk(o)  
pS  
Any Output, Any Bank  
Part–to–Part Skew 1,2  
1.0  
500  
55  
nS  
pS  
%
tsk(pr)  
tsk(pr)  
dt  
Part–to–Part Skew 1,3  
Duty Cycle  
45  
Output Rise/Fall Time  
0.2  
1.0  
nS  
tr, tf  
Note: 1.Tested using standard input levels, production tested @ 133 MHz.  
2. Across temperature and voltage ranges, includes output skew.  
3. For a specific temperature and voltage, includes output skew.  
Low Voltage 1:18 Clock Distribution Chip  
4 of 10  
Notice: The information in this document is subject to change without notice.