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ASM2P3807AHG-20-DT 参数 Datasheet PDF下载

ASM2P3807AHG-20-DT图片预览
型号: ASM2P3807AHG-20-DT
PDF下载: 下载PDF文件 查看货源
内容描述: [Low Skew Clock Driver, 3807 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, GREEN, QSOP-20]
分类和应用: 驱动光电二极管逻辑集成电路
文件页数/大小: 19 页 / 692 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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June 2005  
rev 0.2  
ASM2P3807AH  
ASM2P3807A  
ASM2P3807AH  
Unit  
Min2  
Max  
Min2  
Max  
Symbol  
Parameter  
Propagation Delay  
Conditions1  
CL= 50pF  
tPLH  
tPHL  
tR  
1.5  
4.8  
1.5  
4.3  
nS  
f40MHz  
(See figure 4)  
Output Rise Time  
Output Fall Time  
-
-
1.5  
1.5  
-
-
1.5  
1.5  
nS  
nS  
tF  
tSK(O)  
Output skew: skew  
between outputs of  
same package (same  
transition)  
-
0.6  
-
0.45  
nS  
tSK(P)  
Pulse  
between  
skew:  
skew  
opposite  
transitions of same  
output (|tPHL - tPLH|)  
-
0.6  
-
0.45  
nS  
Package skew: skew  
between outputs of  
different packages at  
same power supply  
voltage, temperature,  
tSK(T)  
-
1
-
0.75  
nS  
package  
type  
and  
speed grade  
NOTES:1. See test circuits and waveforms.  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.  
4. Propagation delay range indicated by Min and Max limit is due to VCC, operating temperature and process parameters. These propagation delay limits  
do not imply skew.  
3.3V CMOS 1-TO-10 CLOCK DRIVER  
8 of 19  
Notice: The information in this document is subject to change without notice.