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ASM1834DS-T 参数 Datasheet PDF下载

ASM1834DS-T图片预览
型号: ASM1834DS-T
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Supply Support Circuit, Fixed, 2 Channel, PDSO8, SOP-8]
分类和应用: 光电二极管
文件页数/大小: 12 页 / 431 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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ASM1834A/D  
Reset Signal Polarity and Output Stage Structure  
The ASM1834 and the ASM1834A supervisors have  
active LOW reset signals. The ASM1834D reset outputs  
are active HIGH.  
The ASM1834 and the ASM1834D have CMOS push-pull  
output stages. The ASM1834A has open drain reset  
outputs.  
RESET  
Polarity  
LOW  
Output Stage  
Configuration  
Push-Pull  
Part #  
ASM1834  
ASM1834U  
ASM1834S  
ASM1834A  
ASM1834AU  
ASM1834AS  
ASM1834D  
ASM1834DU  
ASM1834DS  
LOW  
Push-Pull  
LOW  
Push-Pull  
LOW  
Open Drain  
Open Drain  
Open Drain  
Push-Pull  
LOW  
LOW  
HIGH  
HIGH  
HIGH  
Push-Pull  
Push-Pull  
Manual Reset Operation  
Push-button switch input, PBRST, allows the user to  
override the internal trip point detection circuits and issue  
reset signals. The pushbutton input is debounced and is  
pulled HIGH through an internal 40kΩ resistor.  
When at least one of the reset outputs is not asserted, a  
push button initiated reset signal can be issued by  
holding PBRST LOW for at least 2ms. When PBRST is  
held LOW, both resets become active and remain active  
for approximately 350ms after PBRST returns HIGH.  
(See Figures 3 and 4.)  
Rev. 2 | Page 4 of 12 | www.onsemi.com