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ASM162REUSF/T 参数 Datasheet PDF下载

ASM162REUSF/T图片预览
型号: ASM162REUSF/T
PDF下载: 下载PDF文件 查看货源
内容描述: μP监控电路 [μP Supervisory Circuit]
分类和应用: 电源电路电源管理电路光电二极管监控
文件页数/大小: 9 页 / 184 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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April 2008  
rev 1.5  
ASM161/ASM162  
Pin Description  
Pin #  
Pin  
Function  
Name  
ASM161  
ASM162  
1
1
GND  
Ground.  
RESET Active-LOW, open-drain reset output. RESET remains LOW while VCC is  
below the reset threshold and for 800ms minimum after VCC rises above the  
reset threshold. An external pull-up resistor is needed.  
2
-
-
Active HIGH reset output. RESET remains HIGH while VCC is below the  
RESET  
2
reset threshold and for 800ms after VCC rises above the reset threshold.  
Manual reset input. A negative going edge transition on MR asserts reset.  
Reset remains asserted for one reset time-out period (800 ms min). This  
3
4
3
4
MR  
active-LOW input has an internal pull-up resistor. It can be driven from a  
TTL or CMOS logic line or shorted to ground with a switch. Leave open if  
unused.  
VCC  
Power supply input voltage.  
Detailed Description  
Manual Reset  
The reset function ensures the microprocessor is properly  
reset and powers up into a known condition after a power  
failure.  
The ASM161/162 have a unique manual reset circuit. A  
negative going edge transition on MR initiates the reset.  
A manual reset generates a single reset pulse of fixed  
length. The output-reset pulse remains asserted for the  
Reset Active Time-Out Period tRP and then clears. Once  
the reset pulse is completed, the MR input remains  
disabled for at least 49µS but not more than 122µS. This  
period is specified as tMRD.  
Reset Timing  
A reset is generated whenever the supply voltage is  
below the threshold level (VCC < VTH). The reset duration  
is at least 800ms after VCC has risen above the reset  
threshold and is guaranteed to be no more than  
2 seconds. The rest signal remains active as long as the  
monitored supply voltage is below the internal threshold  
voltage.  
During the MR disabled period, the microcontroller is  
guaranteed a time period free of new manual reset  
signals. This period can be used to refresh critical DRAM  
contents or other system tasks.  
The ASM161 has an open-drain, active LOW RESET  
output (which is guaranteed to be in the correct state for  
VCC down to 1.1 V). The ASM161 uses an external pull-  
up resistor. Output leakage current is under 1µA. A high  
resistance value can be used to minimize current drain.  
The MR pin must be taken HIGH and LOW again after  
the tMRD period has been completed to initiate another  
reset pulse.  
The manual reset input has an internal 20kΩ pull-up  
The ASM162 generates an active-HIGH RESET output.  
resistor. MR can be left open if not used.  
Part Number  
Reset Polarity  
ASM161  
ASM162  
LOW (use external pull-up resistor)  
HIGH  
µP Supervisory Circuit  
3 of 9  
Notice: The information in this document is subject to change without notice.