November 2006
rev 1.4
ASM1233D-L/D/M
Application Information
Operation - Power Monitor
The ASM1233D-L/1233D/1233M detects out-of-tolerance
power supply conditions. It resets a processor during power-
up, power-down and generates a reset to the system
processor when the monitored power supply voltage is below
the reset threshold. When an out-of-tolerance VCC voltage is
tF
VCC
VHTL
VCCTP
VLTL
detected, the RESET signal is asserted. On power-up,
RESET is kept active (LOW) for approximately 350ms after
the power supply voltage has reached the selected tolerance.
This allows the power supply and microprocessor to stabilize
before RESET is released.
t
RESET
RPD
V
OL
tR
Figure 2: Timing Diagram: Power-Down
VHTL
VCCTP
VLTL
t
RPU
VCC
V
OH
RESET
Figure 1: Timing Diagram: Power-Up
3 of 11
Low Power, 5V/3.3V, µP Reset, Active LOW, Open-Drain Output
Notice: The information in this document is subject to change without notice
PULSECORE [ PulseCore Semiconductor ]
