October 2006
rev 1.6
P2781/82/84
Pin Configuration
1
2
3
4
8
7
6
5
XIN / CLKIN
XOUT
VDD
FS0
P278xA
ModOUT
VSS
FS1
LF
Standard pin Configuration offered in both
8 pin SOIC and TSSOP Packages
Pin Description (P278xA)
Pin#
Pin Name
Type
Description
Connect to crystal or clock input. This pin has dual functions. It can be connected
either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left
unconnected.
1
XIN/CLKIN
I
2
3
XOUT
FS1
O
I
Digital logic input used to select input frequency range
(see the Input Frequency Selection Table). This pin has an internal pull-up
resistor.
External Loop Filter for the PLL. By changing the value of the CRC circuit, the
percentage spread can be adjusted accordingly. See the Loop Filter Selection
Table for detail value.
4
LF
I
5
6
VSS
I
Ground Connection. Connect to system ground.
ModOUT
O
Spread Spectrum Clock Output.
Digital logic input used to select input frequency range
(see the Input Frequency Selection Table). This pin has an internal pull-up
resistor.
7
8
FS0
I
VDD
P
Connect to +3.3 V
Input Frequency Selection Table
Output Frequency Scaling (MHz)
Modulation Rate (KHz)
FS1
FS0
Input (MHz)
P2781A
3 to 9
P2782A
6 to 18
P2784A
12 to 36
0
0
1
1
0
1
0
1
3 to 9
Fin / 128
Fin / 256
Fin / 512
Fin / 1024
10 to 19
20 to 38
39 to 78
10 to 19
20 to 38
39 to 78
20 to 38
40 to 76
78 to 156
40 to 76
80 to 152
156 to 312
General Purpose EMI Reduction IC
2 of 11
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
