LNK403-409/413-419
provides tighter clamp voltage tolerance than a Zener clamp.
The RCD clamp is more cost effective than the Zener clamp but
requires more careful design to ensure that the maximum drain
voltage does not exceed the power FET breakdown voltage.
These VOR limits are based on the BVDSS rating of the internal
FET, a VOR of 60 V to 100 V is typical for most designs, giving
the best PFC and regulation performance.
PI-5983-060810
350
250
150
50
0.35
Voltage
Current
0.25
0.15
0.05
-0.05
-0.15
-0.25
0.5
50
100
150
200
250
300
350
400
-50
Series Drain Diode
-150
-250
An ultra-fast or Schottky diode in series with the drain is
necessary to prevent reverse current flowing through the
device. The voltage rating must exceed the output reflected
voltage, VOR. The current rating should exceed two times the
average primary current and have a peak rating equal to the
maximum drain current of the selected LinkSwitch-PH device.
-350
-0.35
Conduction Angle (°)
PI-5984-060810
350
300
250
200
150
100
50
0.35
0.3
Line Voltage Peak Detector Circuit
Voltage
Current
LinkSwitch-PH devices use the peak line voltage to regulate the
power delivery to the output. A capacitor value of 1 mF to 4.7 mF
is recommended to minimize line ripple and give the highest
power factor (>0.9), smaller values are acceptable but result in
lower PF and higher line current distortion.
0.25
0.2
0.15
0.1
Operation with Phase Controlled Dimmers
Dimmer switches control incandescent lamp brightness by not
conducting (blanking) for a portion of the AC voltage sine wave.
This reduces the RMS voltage applied to the lamp thus
reducing the brightness. This is called natural dimming and the
LinkSwitch-PH LNK403-409 devices when configured for
dimming utilize natural dimming by reducing the LED current as
the RMS line voltage decreases. By this nature, line regulation
performance is purposely decreased to increase the dimming
range and more closely mimic the operation of an incandescent
lamp. Using a 49.9 kW REFERENCE pin resistance selects
natural dimming mode operation.
0.05
0
0
50
100
0
150
200
250
300
350
400
Conduction Angle (°)
Figure 9. (a) Ideal Input Voltage and Current Waveforms for a Leading Edge
TRIAC Dimmer at 90° Conduction Angle. (b) Resultant Waveforms
Following Rectification of TRIAC Dimmer Output.
Figure 10 shows undesired rectified bus voltage and current
with the TRIAC turning off prematurely and restarting.
Leading Edge Phase Controlled Dimmers
The requirement to provide flicker-free output dimming with low
cost, TRIAC-based, leading edge phase dimmers introduces a
number of trade-offs in the design.
If the TRIAC is turning off before the end of the half-cycle
erratically or alternate half AC cycles have different conduction
angles then flicker will be observed in the LED light due to
variations in the output current. This can be solved by including
a bleeder and damper circuit.
Due to the much lower power consumed by LED based lighting
the current drawn by the overall lamp is below the holding
current of the TRIAC within the dimmer. This causes undesirable
behaviors such as limited dimming range and/or flickering. The
relatively large impedance the LED lamp presents to the line
allows significant ringing to occur due to the inrush current
charging the input capacitance when the TRIAC turns on. This
too can cause similar undesirable behavior as the ringing may
cause the TRIAC current to fall to zero and turn off.
Dimmers will behave differently based on manufacturer and
power rating, for example a 300 W dimmer requires less
dampening and requires less power loss in the bleeder than a
600 W or 1000 W dimmer due to different drive circuits and
TRIAC holding current specifications. Line voltage also has a
significant impact as at high-line for a given output power the
input current and therefore TRIAC current is lower but the peak
inrush current when the input capacitance charges is higher
creating more ringing. Finally multiple lamps in parallel driven
from the same dimmer can introduce more ringing due to the
increased capacitance of parallel units. Therefore when testing
dimmer operation verify on a number of models, different line
voltages and with both a single driver and multiple drivers in
parallel.
To overcome these issues two circuits, the Active Damper and
Passive Bleeder, are incorporated. The drawback of these
circuits is increased dissipation and therefore reduced efficiency
of the supply so for non-dimming applications these
components can simply be omitted.
Figure 9(a) shows the line voltage and current at the input of a
leading edge TRIAC dimmer with Figure 9(b) showing the
resultant rectified bus voltage. In this example, the TRIAC
conducts at 90 degrees.
9
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